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Material Type: Notes; Class: Computer Organization; Subject: Computer Science and Engineering ; University: University of Nebraska - Lincoln; Term: Unknown 1993;
Typology: Study notes
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Topics Topics
Assembly Programmer’s Execution
Model
Accessing Information
Registers
Memory
Arithmetic operations
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IA32 Processors IA32 Processors
Totally Dominate Computer MarketTotally Dominate Computer Market
Evolutionary DesignEvolutionary Design
Complex Instruction Set Computer (CISC)Complex Instruction Set Computer (CISC)
But, only small subset encountered with Linux programs
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X86 Evolution: Programmer’s View X86 Evolution: Programmer’s View
Name Name DateDate (^) TransistorsTransistors
Pentium IIIPentium III^19991999 8.2M8.2M
Pentium 4Pentium 4^20012001 42M42M
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X86 Evolution: Clones X86 Evolution: Clones
Advanced Micro Devices (AMD)Advanced Micro Devices (AMD)
AMD has followed just behind Intel A little bit slower, a lot cheaper
Recruited top circuit designers from Digital Equipment Corp. Exploited fact that Intel distracted by IA Now are close competitors to Intel
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X86 Evolution: Clones X86 Evolution: Clones
TransmetaTransmeta
Employer of Linus Torvalds
Translates x86 code into “Very Long Instruction Word” (VLIW) code High degree of parallelism
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New Species: IA64 New Species: IA
Name Name DateDate (^) TransistorsTransistors
ItaniumItanium^20012001 10M10M
On-board “x86 engine”
ItaniumItanium 22 20022002 221M221M
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Compiling Into Assembly Compiling Into Assembly
C Code C Code
int sum(int x, int y) { int t = x+y; return t; }
Generated Assembly
_sum: pushl %ebp movl %esp,%ebp movl 12(%ebp),%eax addl 8(%ebp),%eax movl %ebp,%esp popl %ebp ret
Obtain with command gcc -O -S code.c
Produces file code.s
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Assembly Characteristics Assembly Characteristics
Minimal Data TypesMinimal Data Types
Data values Addresses (untyped pointers)
Just contiguously allocated bytes in memory
Primitive OperationsPrimitive Operations
Load data from memory into register Store register data into memory
Unconditional jumps to/from procedures Conditional branches
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Code for sum
0x401040
Object Code Object Code AssemblerAssembler
Linker Linker
E.g., code for malloc , printf
Linking occurs when program begins execution
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Machine Instruction Example Machine Instruction Example C Code C Code
Assembly Assembly
“Long” words in GCC parlance Same instruction whether signed or unsigned
x : Register %eax y : Memory M[ %ebp+8] t : Register %eax » Return function value in %eax
Object Code Object Code
int t = x+y;
addl 8(%ebp),%eax
0x401046: 03 45 08
Similar to expression x += y
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What Can be Disassembled? What Can be Disassembled?
% objdump -d WINWORD.EXE
WINWORD.EXE: file format pei-i
No symbols in "WINWORD.EXE". Disassembly of section .text:
30001000 <.text>: 30001000: 55 push %ebp 30001001: 8b ec mov %esp,%ebp 30001003: 6a ff push $0xffffffff 30001005: 68 90 10 00 30 push $0x 3000100a: 68 91 dc 4c 30 push $0x304cdc
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Moving Data Moving Data
Moving DataMoving Data
Operand TypesOperand Types
Like C constant, but prefixed with ‘ $ ’ E.g., $0x400 , $- Encoded with 1, 2, or 4 bytes
But %esp and %ebp reserved for special use Others have special uses for particular instructions
Various “address modes”
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
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movl movl Operand CombinationsOperand Combinations
movl
Imm
Reg
Mem
Reg
Mem
Reg
Mem
Reg
Source Destination
movl $0x4,%eax
movl $-147,(%eax)
movl %eax,%edx
movl %eax,(%edx)
movl (%eax),%edx
C Analog
temp = 0x4;
*p = -147;
temp2 = temp1;
*p = temp;
*temp = p;
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Simple Addressing Modes Simple Addressing Modes
NormalNormal^ (R)(R)^ MemMem[[RegReg[R]][R]]
DisplacementDisplacement^ D(R)D(R)^ MemMem[[RegReg[R]+D][R]+D]
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Using Simple Addressing Modes Using Simple Addressing Modes
**void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; xp = t1; yp = t0; }
swap: pushl %ebp movl %esp,%ebp pushl %ebx
movl 12(%ebp),%ecx movl 8(%ebp),%edx movl (%ecx),%eax movl (%edx),%ebx movl %eax,(%edx) movl %ebx,(%ecx)
movl -4(%ebp),%ebx movl %ebp,%esp popl %ebp ret
Body
Set Up
Finish
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Understanding Swap Understanding Swap
**void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; xp = t1; yp = t0; }
**movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # xp = eax movl %ebx,(%ecx) # yp = ebx
Stack
Register Variable %ecx yp %edx xp %eax t %ebx t
yp xp Rtn adr (^0) Old % ebp %ebp
Offset
-4 Old % ebx
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Understanding Swap Understanding Swap
**movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # xp = eax movl %ebx,(%ecx) # yp = ebx
0x 0x Rtn adr
%ebp 0
Offset
Address
0x 0x 0x11c 0x 0x 0x 0x10c 0x 0x 0x
yp xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp 0x
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Understanding Swap Understanding Swap
**movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # xp = eax movl %ebx,(%ecx) # yp = ebx
0x 0x Rtn adr
%ebp 0
Offset
Address
0x 0x 0x11c 0x 0x 0x 0x10c 0x 0x 0x
yp xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
0x
0x
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Understanding Swap Understanding Swap
**movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # xp = eax movl %ebx,(%ecx) # yp = ebx
0x 0x Rtn adr
%ebp 0
Offset
Address
0x 0x 0x11c 0x 0x 0x 0x10c 0x 0x 0x
yp xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
0x
0x
123
0x
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Understanding Swap Understanding Swap
**movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # xp = eax movl %ebx,(%ecx) # yp = ebx
0x 0x Rtn adr
%ebp 0
Offset
Address
0x 0x 0x11c 0x 0x 0x 0x10c 0x 0x 0x
yp xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
0x
0x
123
0x
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Understanding Swap Understanding Swap
**movl 12(%ebp),%ecx # ecx = yp movl 8(%ebp),%edx # edx = xp movl (%ecx),%eax # eax = *yp (t1) movl (%edx),%ebx # ebx = *xp (t0) movl %eax,(%edx) # xp = eax movl %ebx,(%ecx) # yp = ebx
0x 0x Rtn adr
%ebp 0
Offset
Address
0x 0x 0x11c 0x 0x 0x 0x10c 0x 0x 0x
yp xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
0x
0x
123
0x
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Indexed Addressing Modes Indexed Addressing Modes
Most General FormMost General Form
D( D(RbRb,,RiRi,S),S) (^) MemMem[[RegReg[[RbRb]+S]+SRegReg[[RiRi]+ D]]+ D]
Unlikely you’d use %ebp , either
Special CasesSpecial Cases
( (RbRb,,RiRi)) MemMem[[RegReg[[RbRb]+]+RegReg[[RiRi]]]]
D( D(RbRb,,RiRi)) (^) MemMem[[RegReg[[RbRb]+]+RegReg[[RiRi]+D]]+D]
( (RbRb,,RiRi,S),S) (^) MemMem[[RegReg[[RbRb]+S]+SRegReg[[RiRi]]]]
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0x10C0x10C 0x11 0x
0x1080x108 0x13 0x
0x1040x104 0x00 0x
0x1000x100 0xFF 0xFF
AddressAddress Value Value
%%ebxebx 0x8 0x
%%edxedx 0x1 0x
%%ecxecx 0x104 0x
%%eaxeax 0x100 0x
RegisterRegister Value Value
(% (%ecxecx,%,%ebxebx))
(% (%eaxeax, %, %edxedx, 4), 4)
254(,% 254(,%edxedx,2),2)
3(% 3(%eaxeax,%,%edxedx))
OperandOperand ValueValue
Exercise Exercise
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More on Data Movement More on Data Movement
MOVB and MOVW MOVB and MOVW
%esi
%edi
%esp
%ebp
%ah %al
%dh %dl
%ch %cl
%bh %bl
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MOVSBL and MOVZBL MOVSBL and MOVZBL
Example: Example:
More on Data Movement More on Data Movement
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% %eaxeax (^) = 0x12345678= 0x
% %edxedx (^) = 0xAAAA22CC= 0xAAAA22CC
MOVB MOVB %dh,%dh, %ah%ah %%eaxeax ==
MOVSBL MOVSBL %dh,%dh, %%eaxeax %%eaxeax ==
MOVZBL MOVZBL %dh,%dh, %%eaxeax %%eaxeax ==
MOVSBL MOVSBL %dl,%dl, %%eaxeax %%eaxeax ==
Exercise Exercise
