State Equivalence and Reduction in Digital Design Principles, Assignments of Neurobiology

A series of reading assignments from the ece 152a - digital design principles course at the university of california, berkeley, focusing on state minimization and equivalence. The texts cover topics such as partitioning minimization procedure, elimination of redundant states, determination of state equivalence using an implication table, and moore reduction procedure. The documents also include examples and explanations of concepts.

Typology: Assignments

Pre 2010

Uploaded on 08/31/2009

koofers-user-b4y-2
koofers-user-b4y-2 🇺🇸

10 documents

1 / 21

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
1
Machine Minimization
ECE 152A – Fall 2006
November 30, 2006 ECE 152A - Digital Design Principles 2
Reading Assignment
Brown and Vranesic
8 Synchronous Sequential Circuits
8.6 State Minimization
8.6.1 Partitioning Minimization Procedure
8.6.2 Incompletely Specified FSMs
pf3
pf4
pf5
pf8
pf9
pfa
pfd
pfe
pff
pf12
pf13
pf14
pf15

Partial preview of the text

Download State Equivalence and Reduction in Digital Design Principles and more Assignments Neurobiology in PDF only on Docsity!

Machine Minimization

ECE 152A – Fall 2006

November 30, 2006 ECE 152A - Digital Design Principles 2

Reading Assignment

„ Brown and Vranesic

‰ 8 Synchronous Sequential Circuits

„ 8.6 State Minimization

‰ 8.6.1 Partitioning Minimization Procedure ‰ 8.6.2 Incompletely Specified FSMs

November 30, 2006 ECE 152A - Digital Design Principles 3

Reading Assignment „ Roth ‰ 15 Reduction of State Tables / State Assignment „ 15.1 Elimination of Redundant States „ 15.2 Equivalent States „ 15.3 Determination of State Equivalence Using an Implication Table „ 15.4 Equivalent Sequential Circuits „ 15.5 Incompletely Specified State Tables

November 30, 2006 ECE 152A - Digital Design Principles 4

Elimination of Redundant States „ Row Matching ‰ Recall CD player controller „ Mealy implementation contained two sets of rows with same next state and output „ Eliminate redundant states „ Row matching doesn’t identify “equivalent states” ‰ Row matching identifies “same state” ‰ Equivalent states are the more general case

November 30, 2006 ECE 152A - Digital Design Principles 7

Determination of State Equivalence using an Implication Table (1) Construct Implication Table for Pairwise Comparison (2) First Pass ‰ Compare outputs „ For states to be equivalent, next state and output must be the same „ Put “X’s” where outputs differ

November 30, 2006 ECE 152A - Digital Design Principles 8

Implication Table (first pass) B C D E F G H A B C D E (^) F G X X X X X X X X X X X X X X X X

H C G 1

G B H 0

F F B 1

E C A 1

D A E 0

C E D 1

B F H 0

A D C 0

PS x=0 x=1 z

NS

November 30, 2006 ECE 152A - Digital Design Principles 9

Determination of State Equivalence using an Implication Table (3) One column (or row) at a time, find implied pairs

November 30, 2006 ECE 152A - Digital Design Principles 10

Implication Table (second pass) B C D E F G H A B C D E (^) F G D-F C-H X A-D C-E B-D C-H A-F E-H B-F H-H C-E A-D E-F B-D C-E D-G A-B E-H C-F A-B C-C A-G C-F B-G X X X X X X X X X X X X X X X

H C G 1

G B H 0

F F B 1

E C A 1

D A E 0

C E D 1

B F H 0

A D C 0

PS x=0 x=1 z

NS

November 30, 2006 ECE 152A - Digital Design Principles 13

Implication Table (second pass) B C D E F G H A B C D E (^) F G D-F C-H X C-E B-D C-H A-F E-H B-F A-D E-F B-D C-E D-G A-B E-H C-F A-B A-G C-FB-G X X X X X X X X X X X X X X X Self-implied pairs Same state pairs

November 30, 2006 ECE 152A - Digital Design Principles 14

Determination of State Equivalence using an Implication Table (4) One column (or row) at a time, eliminate implied pairs

November 30, 2006 ECE 152A - Digital Design Principles 15

Implication Table (third pass) B C D E F G H A B C D E (^) F G D-F C-H X C-E B-D C-H A-F E-H B-F A-D E-F B-D C-E D-G A-B E-H C-F A-B A-G C-F B-G X X X X X X X X X X X X X X X X X X X X X X

H C G 1

G B H 0

F F B 1

E C A 1

D A E 0

C E D 1

B F H 0

A D C 0

PS x=0 x=1 z

NS

November 30, 2006 ECE 152A - Digital Design Principles 16

Determination of State Equivalence using an Implication Table (5) Next pass, one column (or row) at a time, eliminate implied pairs (6) Continue until pass results in no further elimination of implied pairs

November 30, 2006 ECE 152A - Digital Design Principles 19

Determination of State Equivalence using an Implication Table „ Reduced State Table ‰ * indicates change from original state table H C G 1 G B H 0 F F B 1 C C* A* 1 B F H 0 A A* C 0 PS x=0 x=1 z NS

November 30, 2006 ECE 152A - Digital Design Principles 20

Determination of State Equivalence using an Implication Table „ Row Matching on an Implication Table ‰ Mealy Machine outputs „ Recall 101 sequence detector (direct Mealy conversion) D C,0 B, C A,0 D, B C,0 B, A A,0 B, PS x=0 x= NS,z

November 30, 2006 ECE 152A - Digital Design Principles 21

Implication Table ‰ Same state pairs ‰ Eliminate implied pairs ‰ Matching rows „ No implied pairs „ B and D are “same state” B C D A-C B-B X A-B B-B B-B C-C C X X A B X X √ D C,0 B,

C A,0 D,

B C,0 B,

A A,0 B,

PS x=0 x= NS,z

November 30, 2006 ECE 152A - Digital Design Principles 22

Moore Reduction Procedure „ States S (^) i and S (^) j of machine M are said to be equivalent If and only if, for every possible input sequence, the same output sequence will be produced regardless of whether S (^) i or S (^) j is the initial state Zvi Kohavi, Switching and Finite Automata Theory

November 30, 2006 ECE 152A - Digital Design Principles 25

Moore Reduction Procedure „ The result sought is a partition of the states of M such that two states are in the same block if and only if they are equivalent ‰ P 0 corresponds to 0-distinguishablity (includes all states of machine M) ‰ P 1 is obtained simply by inspecting the table and placing those states having the same outputs, under all inputs, in the same block „ P 1 establishes the sets of states which are 1-equivalent

November 30, 2006 ECE 152A - Digital Design Principles 26

Moore Reduction Procedure „ Obtain partition P 2 ‰ This step is carried out by splitting blocks of P 1 , whenever their successors are not contained in a common block of P (^1) „ Iterate process of splitting blocks ‰ If for some k, P (^) k+1 = P (^) k, the process terminates and P (^) k defines the sets of equivalent states of the machine ‰ P (^) k is thus called the equivalence partition „ The equivalence partition is unique

November 30, 2006 ECE 152A - Digital Design Principles 27

Moore Reduction Procedure „ Recall state table from earlier example H C G 1 G B H 0 F F B 1 E C A 1 D A E 0 C E D 1 B F H 0 A D C 0 PS x=0 x=1 z NS

November 30, 2006 ECE 152A - Digital Design Principles 28

Moore Reduction Procedure „ P 0 = (ABCDEFGH) „ P 1 is obtained by splitting states having different outputs ‰ P 1 =(ABDG)(CEFH) „ Block 1 = ABDG, Block 2 = CEFH H C G 1

G B H 0

F F B 1

E C A 1

D A E 0

C E D 1

B F H 0

A D C 0

PS x=0 x=1 z

NS

November 30, 2006 ECE 152A - Digital Design Principles 31

Moore Reduction Procedure „ Split B out of block 1 ‰ B is “2 distinguishable” from A, D and G „ No states of block 2 are “2 distinguishable” „ P 2 = (ADG)(B)(CEFH) ‰ Block 1 = ADG ‰ Block 2 = B ‰ Block 3 = CEFH

November 30, 2006 ECE 152A - Digital Design Principles 32

Moore Reduction Procedure „ Obtain P (^3) ‰ P 2 = (ADG)(B)(CEFH) A D (1) C (3) D A (1) E (3) G B (2) H (3) C E (3) D (1) E C (3) A (1) F F (3) B (2) H C (3) G (1)

H C G 1

G B H 0

F F B 1

E C A 1

D A E 0

C E D 1

B F H 0

A D C 0

PS x=0 x=1 z

NS

November 30, 2006 ECE 152A - Digital Design Principles 33

Moore Reduction Procedure „ Obtain P 3 (cont) ‰ Split G from block 1 „ G is 3-distinguishable from A and D ‰ Split F from block 3 „ F is 3-distinguishable from C, E and H „ P 3 = (AD)(G)(B)(CEH)(F) ‰ Block 1 = AD, block 2 = G, block 3 = B, block 4 = CEH and block 5 = F

November 30, 2006 ECE 152A - Digital Design Principles 34

Moore Reduction Procedure „ Obtain P (^4) ‰ P 3 = (AD)(G)(B)(CEH)(F) A D (1) C (4) D A (1) E (4) C E (4) D (1) E C (4) A (1) H C (4) G (2)

H C G 1

G B H 0

F F B 1

E C A 1

D A E 0

C E D 1

B F H 0

A D C 0

PS x=0 x=1 z

NS

November 30, 2006 ECE 152A - Digital Design Principles 37

Moore Reduction Procedure „ Obtain P 5 (cont) ‰ No blocks split from P (^5) „ P 5 = P 4 = (AD)(G)(B)(CE)(H)(F) ‰ P 5 = P 4 = equivalence partition ‰ Same result as implication table

November 30, 2006 ECE 152A - Digital Design Principles 38

Reduction of Incompletely Specified State Tables „ Use “modified row matching” to combine states D A - 1 - C A - 0 - B C D - - A - B - - PS x=0 x=1 x=0 x= NS Z A and C can be combined A and D can be combined C and D cannot (outputs differ)

November 30, 2006 ECE 152A - Digital Design Principles 39

Reduction of Incompletely Specified State Tables „ Using an Implication Table ‰ State pairs are compatible, not equivalent ‰ States must be “pairwise” compatible „ ABC requires A-B, B-C and A-C „ Compatible relationship is not transitive like equality „ Compatible pairs must be grouped and included in reduced machine

November 30, 2006 ECE 152A - Digital Design Principles 40

Reduction of Incompletely Specified State Tables „ √ indicates “compatible pair” B C D B-D C X A B √ √ A-C A-C A-C and A-D are compatible pairs C-D are not compatible pairs A-B implies B-D; B-D implies A-C → requires ABCD grouping B-C implies A-C; A-B implies B-D → requires ABCD grouping B-D implies A-C → √