Types and Architecture of RAM, ROM, SRAM, DRAM, PROM, EPROM, EEPROM, FLASH, and CAM, Study notes of Architecture

An in-depth exploration of various types of computer memories, including their architecture, components, and access methods. Topics covered include random access memories (RAM), read-only memories (ROM), static RAM (SRAM), dynamic RAM (DRAM), programmable ROM (PROM), erasable programmable ROM (EPROM), electrically erasable programmable RAM (EEPROM), flash memory (FLASH), and content addressable memories (CAM). schematics and explanations of each memory type, as well as their applications and differences.

Typology: Study notes

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Architecture and components of Computer System
Memory Classification
Course In Computer Architecture
IFE Slide 1
With respect to the way of data access we can classify memories as:
- random access memories (RAM),
- sequentially accessible memory (SAM),
- direct access memory (DAM),
- contents addressable memory (CAM).
Access time - the interval of time between the instant of data read/write request, and the
instant at which the delivery of data is completed or its storage is started.
RAM modules SAM/DAM memories: CAM memories find
applications in:
switches, routers etc.
CPUs in cache
controllers
CD-, DVD-ROMS.
tape memories
HDDs
Source of images: Wikipedia.
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Memory Classification

IFE (^) Course In Computer Architecture Slide 1 With respect to the way of data access we can classify memories as:

  • random access memories (RAM),
  • sequentially accessible memory (SAM),
  • direct access memory (DAM),
  • contents addressable memory (CAM). Access time - the interval of time between the instant of data read/write request, and the instant at which the delivery of data is completed or its storage is started. RAM modules SAM/DAM memories: CAM memories find applications in: switches, routers etc. CPUs in cache controllers CD-, DVD-ROMS. tape memories HDDs Source of images: Wikipedia.

Memory Classification

Random access memory - the access time to any piece of data is independent to the physical location of data. Access time is constant. Random access memories can be further classified as:

  • read-write memories (usually referred to as RAMs),
  • read-only memories (ROM). Among random access and read-only memories we distinguish: RAM ROM Static RAM (SRAM) Dynamic RAM (DRAM) Non-volatile RAM (NVRAM) Programmable ROM (PROM) Erasable Programmable ROM (EPROM) Electrically Erasable Programmable ROM (EEPROM); FLASH memory

Random Access Memories

Dynamic random access memories (DRAM) - each one-bit memory cell uses a capacitor for data storage. Since capacitors leak there is a need to refresh the contents of memory periodically (usually once in ฯ„=0,5 รท 2 ms). Memory cell for dynamic random access memory* Both read and write operations require to open the transistor by providing high voltage on line SEL. The bit of data to be written must be given at line IN/OUT. During reading operation the bit of data is available at the same line. Pros and Cons:

  • less expensive (only one transistor per cell),
  • slower than SRAM. *Source of images: J. Biernat, โ€œ Computer Architecture โ€, OWPW, Wroclaw, 2005.

Read Only Memories

Programmable read only memories (PROM) - are programmed during manufacturing process. The contents of each memory cell is locked by a fuse or antifuse (diodes). PROMs are used for permanent data storage. Erasable read only memories (EPROM) - there is a possibility to erase EPROM with ultraviolet light (about 20 minutes) what sets all bits in memory cells to 1. Programming requires higher voltage. Memory cells are built with floating gate transistors. Data can be stored in EPROMs for about 10 years. Electrically erasable read only memories (EEPROM) - erasing does not require ultraviolet light but higher voltage and can be applied not to the whole circuit but to each memory cell separately. *Source of images: Wikipedia. Example of EPROM chip with glass window admitting UV light

Content Addressable Memories

Content addressable memories (CAM) - also known as associative memories; it is a type of computer memory used in applications requiring high speed searching. Such memory replies with โ€œhitโ€ or โ€œlack-of-hitโ€ status when some data vector (pattern) is given at its input. Searching consists in comparing of all data words stored in memory with the given pattern. The mask word indicating all essential bits also must be taken under consideration. If search finishes with hit one of the compliant words is copied to the output buffer. Which word it is determined by the multiply match resolver (MMR). Source of image: J. Biernat, โ€œ Computer Architecture โ€, OWPW, Wroclaw, 2005. Logical structure of an associative memory

CAM/SAM

Applications of CAMs:

  • network routing and switching devices where fast resolving of data recipients` addresses is required,
  • CPU and disk drive cache memories. Sequentially addressable memories (SAM) - access to data is realised in a sequential fashion. Fully sequential are buffers organised as FIFO, LIFO, etc. queues. They find their applications in devices controllers, microprocessors, etc. Direct access memory (DAM) - in literature usually by this term authors refer to memories with block organised data. Access to blocks is direct. However data within blocks is accessed sequentially. As examples we can indicate: magnetic and optical disk drives, tape memories, etc.

Sequentially Accessible Memory

Physical organisation of disks: head - corresponds with one side of a platter; track - circular area on platter where data is stored; sector - a fragment of track that is the smallest portion of data to be read or written on disk; cylinder - a set of tracks with the same number belonging to different platters. disk_capacity = number_of_headsnumber_of_tracksnumber_of_sectors*512 [B] Physical organisation of a disk

Sequentially Accessible Memory

S (BOT) - 11 bytes 00h, D1 โ€“ 0A1FCh, Z1 โ€“ 12 bytes 0FFh, S โ€“ 10 bytes 00h, D3 โ€“ 5EA1h, ID โ€“ sector address ID: byte 1 โ€“ track number, byte 2 โ€“ head number, byte 3 โ€“ sector number, byte 4 โ€“ sector status (invalid sector, sector replacement in spare area), ECC-1, 2 โ€“ byte of error correction code (correction up to 11 errors), Z2 โ€“ 5 bytes 00h, D4 โ€“ 5EA1h, DATA โ€“ 512 bytes, Z3 โ€“ 3 bytes 00h and 17 bytes 0FFh, Z4 โ€“ about. 93 bytes 00h. Structure of a disk track

Sequentially Accessible Memory

RLL data recording technique Run Length Limited (RLL) is a technique applied to data recording on magnetic disks. Each input byte is divided into parts, i.e. chains of bits, that obtain their new bit chain representatives. Such sequences of bits are written on a magnetic layer. Bits with value of 1 correspond with a change in direction of a magnetic field. Example: 10011011 -> (10) + (011) + (011) -> (0100) + (001000) + (001000)

Sequentially Accessible Memory

CD-ROMs In compact disks for data storage one spiral track is used. Data is stored on the disc as the series of microscopic indentations (โ€œpitsโ€) that cause destructive interference of laser light resulting in reduction of intensity of the reflected beam. The linear data density is constant what means that the linear rotational speed of the disk is linear. Such approach requires more complicated reading/writing circuits. The track is divided into sectors each storing 2352 bytes. First 12 bytes contain synchronisation data and next four a sector header. The following 2kB are predestined for user data storage and immediately behind we have: 4 bytes of CRC codes, 8 bytes filled with zeros and 278 bytes of ECCs. pit land land pit land 0000000010000000010000000000000000000010001000000 Laser structure* *Source of image: Wikipedia.