memory organisation, Study notes of Computer Architecture and Organization

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Chapter Twelve Memory Organization

Memory Hierarchy Magnetictapes Magneticdiscs

I/O processor CPU

Mainmemory Cache

Auxiliary memory

Cache Memory

• Very-high speed memory • Smaller capacity, higher cost • Access time is close to processor logicclock cycle time • Stores program segments currently beingexecuted and data frequently accessed • Increases performance of computer

Memory Hierarchy

• Get the performance of fast expensive memory forthe price of slow cheap memory! • GP Registers (2-5 ns) • Cache^ • Level 1 Cache (2-10 ns)^ • Level 2 Cache (5-20 ns) • Main Memory (40–80 ns) • Disk (10 ms seek, 5-100 Mb/s throughput)

Basic Operation of Cache • When CPU needs to access memory, firstchecks cache • If found, then it is a

hit --^

data is read

• If not found, then it is a

miss^ -- access main

memory and transfer block to cache

Metrics

• Hit ratio: h

is the probability that a datum isi^ present at at level i • Access frequency: f= (1-hi^

)(1-h^12

) …. (1-h

)h^ i-1i

-^ Effective access time:^ T

= sum feff^

*ti i

Mapping Procedures

• Associative mapping – fastest and mostflexible • Direct mapping – most rigid • Set-associative mapping – compromisebetween the two

Replacement Policies

Choose the victim:^ • Least Recently Used (LRU)^ • Least Frequently Used (LFU)^ • First In First Out (FIFO)^ • Random^ • Optimal

Flagged Write Back

• Use dirty bit, set when a page is modified • Write back only if it is dirty • Average reference time = Tm + (1-h) (Tp+Wp * Tp)^ Where Wp is the probability that a page ismodified

Write-through

• Update main memory and disk same time • Main memory always has the same data asdisk • Page is loaded on a write-miss and readmiss • Ave. time = Tm + (1-h)Tp + Wt (Td-Tm)^ – Where Wt is the fraction of writes and Td is thedisk access time