Microprocessor and interfacing ,architecture, Lecture notes of Microprocessors

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Teaching Innovation - Entrepreneurial - Global^1

The Centre for Technology enabled Teaching & Learning

DTELDTEL(Department for Technology Enhanced Learning)

DEPARTMENT OF COMPUTER TECHNOLOGY

Microprocessor and Programming

2

NAGAR YUWAK SHIKSHAN SANSTHA’S

SHRI DATTA MEGHE POLYTECHNIC

AUTHORS

MANOJ JETHWA

SYLLABUS GENERAL OBJECTIVE

4

The student will be able to:

Understand the execution of instructions in

pipelining and address generation.

Understand What is microprocessor Architecture.

Apply instructions in Assembly Language Program for

different problem statements.

Use the procedures and macros in assembly

language programming.

CHAPTER-1 Basics of Microprocessor

1. Topic 1:

2^ Topic 2:

3^ Topic 3:

4^ Topic 4:

5

5^ Topic 5:

Evolution of Microprocessor and types

8085 Microprocessor,

Salient features of 8085

Architecture of 8085 - Functional Block diagram,

Pin description,

LECTURE 1: BASIC BLOCK OF COMPUTER

ALU

Control Unit

CPU OR MICROPROCESSOR

INPUT

Devices

OUTPUT Devices

MEMORY (Primary)

MEMORY

(Secondary)

DATA PATH CONTROL SIGNALS

BASIC BLOCK OF COMPUTERS

CONSISTS ü ALU ü INPUT DEVICE ü OUTPUT DEVICE ü MEMORY ü CONTROL UNIT

LECTURE 1:-

The typical Computer system consists of:

§ CPU (central processing unit)

ü ALU (arithmetic-logic unit)

ü Control Logic

ü Registers, etc…

§ Memory

§ Input / Output interfaces

Interconnections between these units are through 3 basic buses:

§ Address Bus

§ Data Bus

§ Control Bus

BASIC BLOCK OF COMPUTER

LECTURE 1:- BUS

The interconnections (known as Interfacing) between the 5 units

of computer system is carried by 3 basic buses i) Address Bus ii)

Data Bus iii) Control Bus. A bus(from the Latin omnibus , meaning

"for all") is essentially a set of wires which is used in computer

system to carry information of the same logical functionality. The

function of the 3 buses is

ü The address bus selects memory location or an I/O device for

the CPU.

ü The data bus transfers information between the

microprocessor and its memory or I/O device. Data transfer

can vary in size, from 8-bits wide to 64 bits wide in various

members of microprocessors.

ü The Control bus generates command signals to synchronise

the CPU operation with IO and Memory devices.

LECTURE 1:- Evolution of Microprocessor

Processo

r

Date of

Launch

Clock

speed

Data Bus

Width

Adress Bus Addressable Memory Size

4004 1971 740 khz 4 bit 12 4 KB

8-BIT PROCESSOR

8008 1972 800 Khz 8 bit 14 16 Kb

8080 1974 2 Mhz 8 bit 16 64 kb

8085 1976 3 Mhz 8 bit 16 64 kb

16-BIT PROCESSOR

8086 1978 5 Mhz 16 20 1M

80286 1982 16 Mhz 16 24 16 M

LECTURE 2:-

INTA

8085 ARCHITECTURE

INTERRUPT CONTROL SERIAL CONTROL

FLAG

ACMULATOR .REGISTER^ TEMP

TIMMING & CONTROL ADRESS /DATA BUFFER

ADRESS BUFFER

INSTRUCTIONDECODER and MACHINECYCLE ENCODING

INSTRUCTION REGISTER (IR)

B C D E H L STACK POINTER (SP) PROGRAM .COUNTER (PC) ADDRESS INCREMENTER / DECREMENTER

MULTIPLEXER

INTERNAL BUS

ALU

INTR RST 5.5 RST 6.5 RST 7.5 TRAP SOD SID

Clock out Reset in Reset out

HOLD HLDA

S0 S IO / M RD

WR READY

X

ALE

X

Clock GEN (^) RESET DMA (^) STATUS (^) CONTROL STATESWAIT

A15-8 AD7-

8-Bit code

256-Bit

LECTURE 2:- (^) Processing Unit

üArithmetic and Logic Unit

üAccumulator

üStatus Flags

üTemporary Register

LECTURE 2:- Arithmetic & Logic Unit (ALU)

ü It performs Arithmetic and logic operations on binary nos.

ü The result is stored in accumulator in most cases, hence A

is known as accumulator.

ü Arithmetic Operations:

ü Addition, Subtraction, Increment, Decrement.

ü Logic Operations:

ü AND, OR, X-OR, Complement.

LECTURE 2:-

ü It the main register of microprocessor directly connected

with the ALU.

ü It is also called register ‘A’.

ü It is an 8-bit register.

ü It is used in the arithmetic and logic operations.

ü It always contains one of the operands on which

arithmetic/logic has to be performed.

ü After the arithmetic/logic operation, the contents of

accumulator are replaced by the result.

Arithmetic & Logic Unit (ALU)

LECTURE 2:-

Status Flag

ü Sign Flag: It is used to indicate whether the result is positive or negative. It will

set (SF=1) if the result is –ve and if the result +ve then SF=0.

ü Zero Flag: It is used to indicate whether the result is a Zero or non-zero. It will set

(ZF=1) if the result is zero else ZF=0.

ü Auxiliary carry Flag: It is used to indicate whether or not the ALU has generated a

carry/Borrow from D3 bit position to D4 bit. It will set if there was a carry out

from bit 3 to bit 4 of the result else AF=0. The auxiliary carry flag is used for

binary coded decimal (BCD) operations.

ü Parity Flag: It is used to indicate parity ( Even or Odd) of the result. It will set if the

parity is even else PF =0.

ü Carry Flag: It is used to indicate whether a carry/Borrow has been generated

/occurred during addition/subtraction It will set if there was a carry is generated

from the MS-bit during addition, or borrow during subtraction/comparison else

CF=0.

Arithmetic & Logic Unit (ALU)

LECTURE 2:-

Program Status Word (PSW)

• The Accumulator and Status Flags clubbed

together is known as Program Status Word (PSW).

• It is a 16-bit word.

Accumulator (8) FLAGs (8)

Arithmetic & Logic Unit (ALU)