ECE 486 LAG COMPENSATOR DESIGN USING BODE PLOTS Fall 08
Reading: FPE, Section 6.7
Let us now consider lag controller design using the Bode plot method. Recall that lag controllers are
approximations to PI controllers, and are used to boost the DC gain (in order to improve the steady
state tracking error). We also saw that lag controllers are sometimes required in order to place poles at
certain locations – this depended on whether the controller needed to contribute a positive or negative
phase in order to cause the root locus to pass through a certain point. Here, we will see how to design lag
compensators using the Bode plot method to improve the phase margin and satisfy steady state tracking
specs. The Bode plot analysis will give us a different perspective on why the pole and zero of the lag
compensator are usually chosen to be very small.
Consider the standard unity feedback loop:
A lag controller will have the form C(s) = Kcs+z
s+p, where z > p. Since z > p, we can write z=βp for some
β > 1. The Bode form of the above controller is then given by
C(s) = Kc
s+βp
s+p=Kc
βp(s
βp + 1)
p(s
p+ 1) =Kcβ
s
βp + 1
s
p+ 1
| {z }
Cg(s)
.
Note that we are interested in the gain-boosting properties of the lag controller, and so we will group the
DC gain βwith the dynamics of the controller in the term Cg(s) (this is in contrast to the lead controller,
where we grouped the DC gain αwith the gain Kc). In this case, we will be using the gain Kcto obtain
a desired phase margin, and the controller Cg(s) to boost the DC gain. Since the Bode plot of C(s)P(s)
is obtained simply by adding together the Bode plots of Cg(s) and KcP(s), let us examine the Bode plot
of Cg(s):
Note from the magnitude plot that Cg(s) will add to the magnitude of KcP(s) at low frequencies, thereby
