Examination Document for Computer Systems Design Module at Cork Institute of Technology, Exams of Digital Systems Design

An examination paper from the computer systems design module at cork institute of technology, which is part of the bachelor of engineering (hons) in electronic systems engineering programme. Instructions for the examination, three questions with sub-questions, and details about the duration, sitting, and examiners. The questions cover topics such as von neumann machine architecture, memory management systems, microprocessors, and interconnection networks.

Typology: Exams

2012/2013

Uploaded on 03/30/2013

lallit
lallit 🇮🇳

4

(27)

150 documents

1 / 3

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
CORK INSTITUTE OF TECHNOLOGY
INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ
Semester 1 Examinations 2011/12
Module Title: Computer Systems Design
Module Code: ELTR8007
School: Electrical & Electronic Engineering
Programme Title: Bachelor of Engineering (Hons) in Electronic Systems
Engineering
Programme Code: EELES_8_Y4
External Examiner(s): Dr A. Donnellan, Mr I. Kennedy
Internal Examiner(s): Mr Fergus O’Reilly
Instructions: Answer 3 questions, all questions carry equal marks.
Duration: 2 hours
Sitting: Winter 2011/12
Requirements for this examination:
Note to Candidates: Please check the Programme Title and the Module Title to ensure that you have
received the correct examination.
If in doubt please contact an Invigilator.
pf3

Partial preview of the text

Download Examination Document for Computer Systems Design Module at Cork Institute of Technology and more Exams Digital Systems Design in PDF only on Docsity!

CORK INSTITUTE OF TECHNOLOGY INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ

Semester 1 Examinations 2011/

Module Title: Computer Systems Design

Module Code: ELTR

School: Electrical & Electronic Engineering

Programme Title: Bachelor of Engineering (Hons) in Electronic Systems Engineering

Programme Code: EELES_8_Y

External Examiner(s): Dr A. Donnellan, Mr I. Kennedy Internal Examiner(s): Mr Fergus O’Reilly

Instructions: Answer 3 questions, all questions carry equal marks.

Duration: 2 hours

Sitting: Winter 2011/

Requirements for this examination:

Note to Candidates: Please check the Programme Title and the Module Title to ensure that you have received the correct examination. If in doubt please contact an Invigilator.

Q1 (a) List three fundamental principles of a Von Neumann machine architecture. Explain the benefits they bring and how/where these have appeared in the modern computer/programming model. [ 10 marks ]

(b) Explain how pipelining can create difficulties in memory access in a Von Neumann machine and how this can be tackled effectively. How is this solution implemented in modern micro-processors, (give examples). [ 10 marks ]

(c) Describe briefly two(2) of the following, using diagrams where appropriate.

 Control and Data Hazards and their solutions  Superscalar Execution, benefits and assisting techniques.  On-Chip cache memories. [14 marks]

[ Total: 34 marks]

Q2 (a) Describe using diagrams how a paged based memory management system can translate a virtual space of 2048MB (31 bit) into a physical space of 128 MB ( bits). Take into account that the average active code/data block is 64 KB in size for this system. [14 marks]

(b) Using diagrams describe how a high-end server type machine, with 2- commodity 32 bit processors (32 bit registers but 36 bit addresses for memory) (e.g. Sun UltraSparc or Pentium Xeon vairants), would typically be organised, for good flexibility and performance. It will have 64-128 GB RAM. State and justify the memory models used and what name might commonly be given to this type of machine or organisation. [10 marks]

(c) A paging based virtual memory system has the following utilisations. CPU Utilisation 20% Paging Disk 95% Other I/O 5%

Explain what is happening and what causes it. What steps if any do you think could be taken to improve CPU utilisation? [10 marks]

[ Total: 34 marks]