Operating System - Memory Management Part 3 - Notes, Study notes of Operating Systems

In this document description about Memory Protection, Valid (v) or Invalid (i) Bit In A Page Table, Hierarchical Page Tables, Two-Level Paging Example, Two-Level Page-Table Scheme, Shared Pages Example.

Typology: Study notes

2010/2011

Uploaded on 09/01/2011

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MEMORY MANAGEMENT
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MEMORY MANAGEMENT

Memory Protection

  • (^) Memory protection implemented by associating protection bit with each frame
  • (^) Valid-invalid bit attached to each entry in the page table: - (^) “valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page - (^) “invalid” indicates that the page is not in the process’ logical address space

Hierarchical Page Tables

  • (^) Break up the logical address space into multiple

page tables

  • (^) A simple technique is a two-level page table

Two-Level Paging Example

  • (^) A logical address (on 32-bit machine with 4K page size) is divided into:
    • (^) a page number consisting of 20 bits
    • (^) a page offset consisting of 12 bits
  • (^) Since the page table is paged, the page number is further divided into:
    • (^) a 10-bit page number
    • (^) a 10-bit page offset
  • (^) Thus, a logical address is as follows: where pi is an index into the outer page table, and p 2 is the displacement within the page of the outer page table page number (^) page offset pi p 2 d 10 10 12
  • Address-translation scheme

for a two-level 32-bit paging

architecture

Shared Pages

  • (^) Shared code
    • (^) One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems).
    • (^) Shared code must appear in same location in the logical address space of all processes
  • (^) Private code and data
    • (^) Each process keeps a separate copy of the code and data
    • (^) The pages for the private code and data can appear anywhere in the logical address space

Segmentation

  • (^) Memory-management scheme that supports user view of memory
  • (^) A program is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, local variables, global variables, common block, stack, symbol table, arrays

User’s

View of a

Program

Segmentation Architecture

  • (^) Logical address consists of a two tuple: <segment-number, offset>,
  • (^) Segment table – maps two-dimensional physical addresses; each table entry has: - (^) base – contains the starting physical address where the segments reside in memory - (^) limit – specifies the length of the segment
  • (^) Segment-table base register (STBR) points to the segment table’s location in memory
  • (^) Segment-table length register (STLR) indicates number of segments used by a program; segment number s is legal if s < STLR

Segmentation Architecture

(Cont.)

  • (^) Relocation.
    • (^) dynamic
    • (^) by segment table
  • (^) Sharing.
    • (^) shared segments
    • (^) same segment number
  • (^) Allocation.
    • (^) first fit/best fit
    • (^) external fragmentation

Address

Translation

Architecture

Example of

Segmentation

Virtual Memory

  • (^) Background
  • (^) Demand Paging
  • (^) Process Creation
  • (^) Page Replacement
  • (^) Allocation of Frames
  • (^) Thrashing
  • (^) Demand Segmentation
  • (^) Operating System Examples

Background

  • (^) Virtual memory – separation of user logical memory from physical memory. - (^) Only part of the program needs to be in memory for execution. - (^) Logical address space can therefore be much larger than physical address space. - (^) Allows address spaces to be shared by several processes. - (^) Allows for more efficient process creation.