Computer Systems: Output Compare for Waveform Generation & Signal Frequency Measurement, Study notes of Microcomputers

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ECE 3120: Computer Systems Chapter 8: Output Compare Function

Manjeera Jeedigunta

http://blogs.cae.tntech.edu/msjeedigun21Email: [email protected]: 931-372-6181, Prescott Hall 120

Output Compare Function †^ The HCS12 has eight output compare functions. †^ Each output compare channel consists of^ „^ A 16-bit comparator^ „^ A 16-bit compare register TCx (also used as inout captureregister)^ „^ An output action pin (PTx, can be pulled high, pulled low,or toggled)^ „^ An interrupt request circuit^ „^ A forced-compare function (CFOCx)^ „^ Control logic

(^6 ) 5 4

3 2

1 0

OM7^ OL^

OM6^ OL^

OM5^ OL^

OM4^ OL

valueafter reset^0

0 0

0 0

0 0

0

(^6 7) read: anytimewrite: anytime Figure 8.18 Timer control register 1 and 2 (TCTL1 & TCTL2) 5 4

3 2

1 0

OM3^ OL^

OM2^ OL^

OM1^ OL^

OM0^ OL

0 0

0 0

0 0

0 0

(a) TCTL1 registervalueafter reset(b) TCTL2 registerOMn OLn : output level^00 no action (timer disconnected from output pin)^01 toggle OCn pin^10 clear OCn pin to 0^11 set OCn pin to high

Operation of the Output-Compare Function^ †^ The action is determined by the Timer Control Register 1 & 2 (TCTL1& TCTL2):^ †^ A successful compare will set the corresponding flag bit in the TFLG1register.^ †^ An interrupt may be optionally requested if the associated interruptenable bit in the TIE register is set.

5

300 μs^700 μ

s Figure 8.19 1 KHz 30 percent duty cycle waveform

Operation of the Output-Compare Function †^ Example 8.4 Solution:^ An active high 1 KHz waveform with 30percent duty cycle is shown in Figure 8.19. The logicflow of this problem is illustrated in Figure 8.20.^ Setting the prescaler to the TCNT to 8, then theperiod of the clock signal to the TCNT will be 1/3μs. The numbers of clock cycles that the signal ishigh and low are 900 and 2100, respectively.

Generate an active high 1 KHz digital waveform with 30 percent

duty cycle from the PT0 pin. Use the polling method to check the success of theoutput compare operation. The frequency of the E clock is 24 MHz.

Start Select pull high as pin action Clear C0F flag Start OC0 output comparewith a delay of 700^ μs no C0F = 1?yes Select pull low as pin actionClear C0F flagStart OC0 output comparewith a delay of 300^ μs yesno C0F = 1? Figure 8.20 The program logic flow for digital waveform generation

7

delayby1ms

pshd^ movb^ #$90,TSCR

; enable TCNT & fast flags clear movb^ #$06,TSCR

; configure prescaler to 64 bset^ TIOS,OC

; enable OC ldd^ TCNT again^

addd^ #

; start an output-compare operation std^ TC^

; with 1 ms time delay

wait_lp^

brclr^ TFLG1,COF,wait_lp0 ldd^ TC0 dbne^ y,again0 puld rts †^ Example 8.

Write a function to generate a time delay which is a multiple of 1 ms. Assume that the E clock frequency is 24 MHz.The number of milliseconds is passed in Y. † Solution:^

One method to create 1 ms delay is as follows: „^ Set the prescaler to TCNT to 64 „^ Perform the number of output-compare operations (given in Y) with eachoperation creating a 1-ms time delay. „^ The number to be added to the copy of TCNT is 375. (

×^64 ÷

24000000 = 1 ms)

#include^ "c:\MiniIDE\hcs12.inc"CR^ equ

$0D

LF^ equ

$0Aorg $ oc_cnt^ rmb

frequency rmb

(^2) org $1500movb^ #$90,TSCR

; enable TCNT and fast timer flags clear movb^ #$02,TSCR

; set prescale factor to 4 movb^ #$02,TIOS

; enable OC1 and IC movb^ #100,oc_cnt

; prepare to perform 100 OC1 operation, each; creates 10 ms delay and total 1 second movw^ #0,frequency

; initialize frequency count to 0 movb^ #$01,TCTL

; prepare to capture the rising edges of PT movb^ #C0F,TFLG

; clear the C0F flag bset^ TIE,IC

; enable IC0 interrupt cli^

;^ "

†^ Example 8.6 Use an input-capture and an output-compare functions tomeasure the frequency of the signal connected to the PT0 pin

.

†^ Solution:

To measure the frequency, we will „ Use one of the output-compare function to create a one-second time base. „ Keep track of the number of rising (or falling) edges that arrived at the PT0 pin withinone second.