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Main points of this exam paper are: Parallel-Search, Transmitter, Receiver Block, Spectrum System, Explain, Spread Spectrum Communication, System Employs, Spectrum, Hop Spread, Frequency
Typology: Exams
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Data Signal x(t)
pN Code g(t)
Carrier 2 P cos ω 0 t
BPSK o/p
Modulator
Fig. Q2_(a)
Fig. Q2_(b)
g(t) 1 0 1 0
The pN code generator in Fig Q2-(b) emits the PRBS stream g(t) at a rate of 225 chips per sec from an initial seed 1010. (i) Sketch the final transmitted sequence x(t)g(t). (ii) What is the bandwidth of the transmitted signal? (iii) What is the processing gain? (iv) If the received signal delay T (^) d is a single chip with respect to the receiver PRBS g(t) sketch the resultant despread sequence. (14 %)
Correlator
pN Code g ( t − T ˆ d )
A *^2 P ⋅ x ˆ( t − T ˆ d )
BPSK Data Demodulator
Fig. Q2_(c)
Filter
(c) Describe the demodulation process illustrated in Fig.Q2_(c) and discuss in detail the action of the correlator in the synchronization process. (9.33 %) [33.33 %]
Q3 (a) Draw the block diagram of a parallel-search acquisition system for Direct
Sequence Spread Spectrum receiver synchronization and discuss its operation. If λ chips of the pN code, with timing epoch Tc, are examined during a correlation period with a probability P (^) D of correct detection show that the average acquisition time of the DS receiver is given by
P D
Tc Tacq = λ (14%)
(b) Draw the block schematic of the RASE method for direct sequence acquisition and compare this with the parallel search method in part (a). What are the advantages and disadvantages of this type of acquisition? (8%)
Local pN Code Generator
g ^ t + T 2^ c +τ
Early Correlator
Despreading Correlator Z(t) (^) Data Demodulator g(t+ τ ) BPF
BPF Late Correlator
g ^ t − T 2^ c +τ
VCO (^) FilterLoop
Square Law Detector
Square Law Detector
Data O/P
Y( τ ) Σ
Received DS-BPSK Signal
Data: x(t) pN Code: g(t)
Fig.Q3 (c) Direct Sequence Delay Locked Loop Tracker