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Homework #
(to be due on Sep 15
th , 2008)
Please explain why there is a parasitic junction capacitor across the
diode when it is reverse-biased. (weight:15%)
"Because of the additional positive and negative charges induced in the space-charge
region with an increase in reverse-bias voltage, a capacitance is associated with the pn
junction when a reverse-bias voltage is applied. " Basically, the positive terminal of the
source attracts the negative charges on the n semiconductor, and the negative terminal
attracts the positive charges on the p semiconductor. This action increases the width of the
depletion region. Namely, the diode gets CHARGED and gets capacitance.
Please solve Problem 1.10 (weight:10%)
E=15V/cm
σ =2.2 ( Ω -cm)⁻ ¹
A=10⁻⁴cm ²
J(drift current density) = σ E = 2.2 × 15 = 33 A/cm ²
A(drift current) = 33 A/cm ² × 10 ⁻⁴cm ² = .0033 A
At room temperature, Please solve Problem 1.18 (weight:15%)
o forward biasing a P-N junction diode, what is the maximum voltage can be
pplied? (weight:10%)
Vbi
he built-in potential barrier
hn, Jeeyun (904067681)
n i at room temp.
= 1.5 × 10
10 cm
k = 1.3806503 × 10
2 kg s
a) 0.026 × ln[(
16 )
2 / (1.5 × 10
10 )
2 ] = .697322 V
b) 0.026 × ln[(
18 × 10
16 )/ (1.5 × 10
10 )
2 ] = .817057 V
c) 0.026 × ln[(
18 )
2 / (1.5 × 10
10 )
2 ] = .936791 V
At room temperature, Please solve Problem 1.22 and discuss the
physical meaning of capacitance tendency regarding to the reverse
biasing voltage (weight:20%)
o forward biasing a P-N junction diode, what is the maximum voltage can be
pplied? (weight:10%)
Vbi
he built-in potential barrier
hn, Jeeyun (904067681)
C j.
= C j
(1 + V R
/ V bi
)
-1/
V bi
= 0.026 × ln[(
15 × 10
16 )/ (1.5 × 10
10 )
2 ] = 0.
a) C j
= 0.4 × (1 + 1 / 0.637455)
-1/ =0.4 × .623936 = .249574 pF
b) C j
= 0.4 × (1 + 3 / 0.637455)
-1/ =0.4 × .418626 = .16745 pF
c) C j
= 0.4 × (1 + 5 / 0.637455)
-1/ =0.4 × .336266 = .134506 pF
Please illustrate the physical meaning of the load line? Whose I-V
relationship is the load line to describe (weight:20%)
Conceptually, in the load line method, we consider the rest of the circuit
excluding the diode as one load. This load should have a resistance; the
entire circuit excluding the diode works as a resistor. This means that we
consider the circuit in two parts only: a resistor and a diode. The resistance
of the virtual resistor draws a straight line on the V vs I graph. The line can
be vertical or horizontal at certain circumstance.
Please explain the significance of the DC equivalent circuit and its
analysis in the AC analysis of a circuit with diode? In which condition,
using a equivalent resistor, r d
, as shown in Figure1.35(b), is good
enough? Whereas, in which condition, we need to parallel the
additional capacitors, as shown in Figure 1.37? (weight:20%)
