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Lecture # 21
Processor Identification
_getproc proc near
pushf ;Secure flag register contents push di
;== Determine whether model came before or after 80286 ====
xor ax,ax ;Set AX to 0 push ax ;and push onto stack popf ;Pop flag register off of stack pushf ;Push back onto stack pop ax ;and pop off of AX and ax,0f000h ;Do not clear the upper four bits cmp ax,0f000h ;Are bits 12 - 15 all equal to 1? je not_286_386 ;YES --> Not 80386 or 80286
In the above slide the test for 8086 or not is performed by clearing all the bits of flags
register then reading its value by pushing flags and then poping it in AX, the bits 15-12 of
ax are checked if they have been set then it’s a 8086.
;-- Test for determining whether 80486, 80386 or 80286 ------
mov dl,p_80286 ;In any case, it's one of the mov ax,07000h ;three processors push ax ;Push 07000h onto stack popf ;Pop flag register off pushf ;and push back onto the stack pop ax ;Pop into AX register and ax,07000h ;Mask everything except bits 12- je pende ;Are bits 12 - 14 all equal to 0? ;YES --> It's an 80286 inc dl ;No --> it's either an 80386 or an ;80486. First set to 386
;-- The following test to differentiate between 80386 and --- ;-- 80486 is based on an extension of the EFlag register on ;-- the 80486 in bit position 18. ;-- The 80386 doesn't have this flag, which is why you ;-- cannot use software to change its contents.
The above slide further performs the test for 80286 if the previous test fails. It sets the bit
14-12 of flags and then again reads back the value of flags through stack. If the bits 14-
have been cleared then it’s a 80486.
cli ;No interrupts now
mov ebx,offset array
mov [ebx],eax
pushfd
pop eax
mov first,eax;
mov [ebx+1],eax
pushfd
pop eax
shr first,
shr eax,
and first,
and eax,
cmp first,eax
inc dl
sti
jne pende
The above code performs the alignment test as discussed before by test the 18
th
bit after
addressing a double word at an odd address.
pushfd pop eax mov temp, eax mov eax, shl eax, push eax popfd pushfd pop eax shr eax, shr temp, cmp temp, eax inc dl je pende
jmp pende ;Test is ended
A CPUID Program
#include "stdafx.h" #include <stdio.h> #include <dos.h> unsigned long int id[3]; unsigned char ch='\0'; unsigned int steppingid ; unsigned int model,family,type1 ; unsigned int cpcw; int main(int argc, char* argv[]) { _asm xor eax,eax _asm cpuid _asm mov id[0], ebx ; _asm mov id[4], edx ; _asm mov id[8], ecx; printf(" %s\n ", (char *) (id)); _asm mov eax, _asm cpuid _asm mov ecx,eax _asm AND eax,0xf; _asm mov steppingid,eax; _asm mov eax, ecx
_asm shr eax, _asm and eax, 0xf; _asm mov model,eax _asm mov eax,ecx _asm shr eax, _asm and eax, 0xf _asm mov family,eax; _asm mov eax,ecx _asm shr eax, _asm and eax, 0x3; _asm mov type1, eax; printf("\nstepping is %d\n model is %d\nFamily is %d\nType is %d\n",steppingid,model,family,type1); }
The above program places 0 in eax register before issuing the CPUID instruction. The
string returned by the instruction is then stored and printed moreover other information
about family, model etc is also printed.
Detecting a Co Processor
_asm finit _asm mov byte ptr cpcw+1, 0; _asm fstcw cpcw if ( *(((char *) (&cpcw))+1)==3) puts("Coprocessor found"); else puts ("Coprocessor not found");
After initialization the control word is read if the higher byte contains the value 3.
_getco proc near mov dx,co_none ;First assume there is no CP
mov byte ptr cs:wait1,NOP_ CODE ;WAIT-instruction on 8087 mov byte ptr cs:wait2,NOP_ CODE ;Replace by NOP wait1: finit ;Initialize Cop mov byte ptr cpz+1,0 ;Move high byte control word to 0 wait2: fstcw cpz ;Store control word cmp byte ptr cpz+1,3 ;High byte control word = 3? jne gcende ;No ---> No coprocessor ;-- Coprocessor exists. Test for 8087 ----------------------- inc dx and cpz,0 FF7 Fh ;Mask interrupt enable mask flag fldcw cpz ;Load in the control word fdisi ;Set IEM flag fstcw cpz ;Store control word test cpz,80h ;IEM flag set? jne gcende ;YES ---> 8087, end test
In the code above the IEM bit is set and then the value of control word is read to analyse
change in the control word. If the most significant bit is set then it’s a 8087 co processor
otherwise other tests must be performed.
7 6 5 4 3 2 1 0
Port 64H Status Register
1 = Output Buffer full
1 = Input Buffer full
1 = Keyboard Active
1 = Parity Error
1 = Time Out Error during input 1 = Time Out Error during output
The above slide shows the detailed meaning of bits in port 64H.
Typematic Rate
Typematic Rate 11111 = 2 char/s 11110 = 2.1 char/s 11101 = 2.3 char/s 11010 = 3 char/s :::::::::::::::: :::::::::::::::: 00100 = 20 char/s 00011 = 21.8 char/s 00010 = 24 char/s 00001 = 26.7 char/s 00000 = 30 char/s
Delay 00 ¼ Second 01 ½ Second 10 ¼ Second 11 1 Second
7 6 5 4 3 2 1 0
The typematic rate of the keyboard can be controlled by a control word as depicted in the
slide above. The delay and typematic rates need to be specified in this control word. The
delay indicates the delay between first and second character input whenever a key is
pressed. The timing of rest of the successive character inputs for the same key is
determined by the typematic rate.
Recieving bytes From
Keyboard
60H
64H
Input from Keyboard
Input buffer full
The input character scan code is received at port 60H. A certain bit in the port 64H or
keyboard controller is used as the IBF (input buffer full) bit. A device driver can check
this bit to see if a character has been received from the keyboard on which this bit will
turn to 1.
Sending bytes to the Keyboard
60H
64H
From Proce ssor
Output buffer full
Later on Receives 0xFA to indicate succe ssful transmi ssion
Similarly some data (as control information) can be send to the keyboard. The processor
will write on the port 60H. The device driver will check the OBF( output buffer full bit of
port 64H which remains set as long as the byte is not received by the keyboard. On
