Quiz 1: Digital Logic Design - BS (Data Science) at NUCES, Lahore Campus, Quizzes of Digital Logic Design and Programming

The quiz 1 questions and instructions for the digital logic design course (el-1005) in the bs (data science) program at national university of computer and emerging sciences (nuces), lahore campus. The quiz covers topics such as truth tables, min-terms, and karnaugh map reduction. Students are required to design digital circuits based on given specifications.

Typology: Quizzes

2021/2022

Uploaded on 10/14/2022

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National University of Computer and Emerging Sciences, Lahore Campus
Course: Digital Logic Design Course Code: EL-1005
Program: BS (Data Science) Semester: Fall 2022
Duration: 20 minutes Total Marks: 20
Paper Date: 07-October-22 Weight 5%
Section: E1 Page(s): 3
Exam: Quiz 1 Reg. No.
Q1. You have to design a digital system with 4-bit binary number as input. This system displays the total
number of 1’s present in the input.
a) Make a truth table for the circuit
b) Find the expression in the form of Min-terms
c) Reduce the expression using KMAP
d) Draw the reduced circuit of the expression in part (c)
Q2. Design a logic circuit whose output 1 is high only when a majority of inputs A, B, C and D are low
and output 2 is high when majority of the inputs A, B, C and D are high?
a) Make a truth table for the circuit
b) Find the expression in the form of Min-terms
c) Reduce the expression using KMAP
d) Draw the reduced circuit of the expression in part (c)
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National University of Computer and Emerging Sciences, Lahore Campus

Course: Digital Logic Design Course Code: EL- Program: BS (Data Science) Semester: Fall 2022 Duration: 20 minutes Total Marks: 20 Paper Date: 07-October-22 Weight 5% Section: E1 Page(s): 3 Exam: Quiz 1 Reg. No. Q1. You have to design a digital system with 4-bit binary number as input. This system displays the total number of 1’s present in the input. a) Make a truth table for the circuit b) Find the expression in the form of Min-terms c) Reduce the expression using KMAP d) Draw the reduced circuit of the expression in part (c) Q2. Design a logic circuit whose output 1 is high only when a majority of inputs A, B, C and D are low and output 2 is high when majority of the inputs A, B, C and D are high? a) Make a truth table for the circuit b) Find the expression in the form of Min-terms c) Reduce the expression using KMAP d) Draw the reduced circuit of the expression in part (c) 1