Operating Systems at University of Virginia: Topic 13 - Sharing Main Memory through Paging, Study notes of Operating Systems

This document from the university of virginia's cs 414 operating systems course explores the concept of paging, a memory management technique used to simplify allocation and swapping. The goals, advantages, and challenges of paging, including internal fragmentation, efficiency, and table space. It also covers related topics like segmentation, translation look-aside buffers (tlbs), and multi-level paging.

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CS 414 : Operating Systems
UNIVERSITY OF VIRGINIA
Department of Computer Science
Spring 2008
Topic 13: Sharing Main Memory -- Paging
g
Readings for this topic: Ch.8 (8.4 & 8.5)
g
Paging: goal is to make allocation and swapping easier.
g
Make all chunks of memory the same size, call them pages. Typical sizes range from
512-8k bytes.
g
For each process, a page table defines the base address of each of that process’ pages
along with read-only and existence bits.
g
Translation process: page number always comes directly from the address. Since page
size is a power of two, no comparison or addition is necessary. Just do table lookup and
bit substitution.
g
Easy to allocate: keep a free list of available pages and grab the first one. Easy to swap
since everything is the same size, which is usually the same size as disk blocks to and
from which pages are swapped.
g
Problems of paging:
g
Internal fragmentation: The larger the page, the worse this is.
g
Efficiency of access: even small page tables are generally too large to load into fast
memory in the relocation box. Instead, page tables are kept in main memory and the re-
location box only has the page table’s base address. It thus takes one overhead reference
for every real memory reference.
g
Table space: Page tables are big. How big? Consider a 32-bit addresss space with 4k
pages as in Windows XP.
13.1
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CS 414 : Operating Systems

UNIVERSITY OF VIRGINIA

Department of Computer Science

Spring 2008

Topic 13: Sharing Main Memory -- Paging

g Readings for this topic: Ch.8 (8.4 & 8.5)

g Paging: goal is to make allocation and swapping easier. g Make all chunks of memory the same size, call them pages. Typical sizes range from 512-8k bytes. g For each process, a page table defines the base address of each of that process’ pages along with read-only and existence bits. g Translation process: page number always comes directly from the address. Since page size is a power of two, no comparison or addition is necessary. Just do table lookup and bit substitution. g Easy to allocate: keep a free list of available pages and grab the first one. Easy to swap since everything is the same size, which is usually the same size as disk blocks to and from which pages are swapped.

g Problems of paging: g Internal fragmentation: The larger the page, the worse this is. g Efficiency of access: even small page tables are generally too large to load into fast memory in the relocation box. Instead, page tables are kept in main memory and the re- location box only has the page table’s base address. It thus takes one overhead reference for every real memory reference. g Table space: Page tables are big. How big? Consider a 32-bit addresss space with 4k pages as in Windows XP.

g Paging with segmentation: use two levels of mapping to make tables manageable. g Each segment contains one or more pages. g Segments correspond to logical units: code, data, stack. Segments vary in size and are often large. Pages are for the use of the OS; they are fixed-size to make it easy to manage memory. g Going from paging to P+S is like going from single segment to multiple segments, ex- cept at a higher level. Instead of having a single page table, have many page tables with a base and bound for each. Call the stuff associated with each page table a segment.

g We can share at two levels: single page, or single segment (whole page table).

g Pages eliminate external fragmentation, and make it possible for segments to grow without any reshuffling.

g If page size is small compared to most segments, then internal fragmentation is not too bad.

g The user is not given access to the paging tables.

g Problem with segmentation and paging: extra memory references to access translation tables can slow programs down by a factor of two or three. Too many entries in translation tables to keep them all loaded in fast processor memory.

g Page table structures g Multi-level (hierarchical) paging: paging the page table g For big address space, two-level paging may not be enough. g Hashed page tables: page number is the virtual address is hashed into the hash table. g Each entry in the hash table contains linked list of elements consisting of 1) virtu- al page number, 2) physical page number, 3) pointer to the next element in the link list. g Inverted page tables: page table contains one netry for each physical page frame; each entry consists of process id and virtual page number. g Logical address contains the process id, virtual page number, and offset.

g TBs are a lot like hash tables except simpler (must be to be implemented in hardware). Some hash functions are better than others. g Is it better to use low page number bits than high ones?

g Another approach: let any given virtual page use either of two slots in the TB. Make memory wider, use two comparators to check both slots at once. g This is about as fast as the simple scheme, but a bit more expensive (two comparators instead of one, also have to decide which old entry to replace when bringing in a new entry). g Advantage: less likely that there will be conflicts that degrade performance (takes three pages falling in the same place, instead of two).

g Cache terminology g Direct mapped. g Set associative. g Fully associative.

g Must be careful to flush TB during each context swap. Why? g Valid bit

g Problem: how does the operating system get information from user memory? E.g. I/O buffers, parameter blocks. Note that the user passes the OS a virtual address. g In some cases the OS just runs unmapped. Then all it has to do is read the tables and translate user addresses in software. However, addresses that are contiguous in the vir- tual address space may not be contiguous physically. Thus I/O operations may have to be split up into multiple blocks.