Microarchitecture Simulation in CS2410: Computer Architecture at University of Pittsburgh , Study notes of Computer Architecture and Organization

The importance and challenges of microarchitecture simulation in the context of the cs2410: computer architecture course at the university of pittsburgh. It covers the benefits of simulation, simulation issues, and the use of full system simulators like simics. The document also provides instructions for installing and running simics.

Typology: Study notes

Pre 2010

Uploaded on 09/17/2009

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CS2410: Computer Architecture
Microarchitecture simulation issues
Sangyeun Cho
Dept. of Computer Science
University of Pittsburgh
Why microarchitecture simulation?
Arbitrary level of details and precision
Pipelines, branch predictors, caches, main memory, …
Novel microarchitectural ideas
Hardware devices (e.g., hard drive, timer, …)
Full observability
CS2410: Computer Architecture University of Pittsburgh
Challenges
Modeling time
Validation
Simulation time (speed)
If you have an idea to check, you may want to perform “proof-of-concept”
experiments before undertaking full microarchitecture modeling for
simulations
E.g., collect necessary trace from program execution and process trace data
Full system simulator?
Widely used microarchitecture simulators, such as
SimpleScalar, use user-code-only simulation
They do not simulate OS codes
Some of them have a proxy call mechanism (to get help from the host
OS on a simulated program’s system calls)
CS2410: Computer Architecture University of Pittsburgh
Full system simulator provides a view of a more realistic
machine so that a native OS can be booted
OS codes are actually simulated
Accuracy?
Function vs. timing simulation
Functional simulation
Captures and simulates basic instruction semantics
Updates processor states (register, memory, …)
Generates correct program output
CS2410: Computer Architecture University of Pittsburgh
Timing simulation
(Typically) performs functional simulation
Implements various microarchitectural structures
Captures the timing of events to obtain program execution time
Functional simulation takes less time
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CS2410: Computer Architecture

Microarchitecture simulation issues

Sangyeun Cho

Dept. of Computer Science University of Pittsburgh

Why microarchitecture simulation?

ƒ Arbitrary level of details and precision

  • Pipelines, branch predictors, caches, main memory, …
  • Novel microarchitectural ideas
  • Hardware devices (e.g., hard drive, timer, …)

ƒ Full observability

CS2410: Computer Architecture (^) University of Pittsburgh

ƒ Challenges

  • Modeling time
  • Validation
  • Simulation time (speed) If you have an idea to check, you may want to perform “proof-of-concept” experiments before undertaking full microarchitecture modeling for simulations - E.g., collect necessary trace from program execution and process trace data

Full system simulator?

ƒ Widely used microarchitecture simulators, such as

SimpleScalar , use user-code-only simulation

  • They do not simulate OS codes
  • Some of them have a proxy call mechanism (to get help from the host OS on a simulated program’s system calls)

CS2410: Computer Architecture (^) University of Pittsburgh

ƒ Full system simulator provides a view of a more realistic

machine so that a native OS can be booted

  • OS codes are actually simulated

ƒ Accuracy?

Function vs. timing simulation

ƒ Functional simulation

  • Captures and simulates basic instruction semantics
  • Updates processor states (register, memory, …)
  • Generates correct program output

CS2410: Computer Architecture (^) University of Pittsburgh

ƒ Timing simulation

  • (Typically) performs functional simulation
  • Implements various microarchitectural structures
  • Captures the timing of events to obtain program execution time

ƒ Functional simulation takes less time

Simulation time example

ƒ Using gcc (in spec2k) with a small input as our benchmark

Case Time (sec) Ratio to “native”

Ratio to “functional” Native 1.054 1 -

CS2410: Computer Architecture (^) University of Pittsburgh

sim-fast 167 158 1 sim-outorder 4,247 4,029 25 simics (bare) 461 437 1 simics w/ ruby 41,245 39,131 89 simics w/ ruby+opal 155,621 147,648 338

Measured by Lei Jin on antimony (3.8GHz Xeon w/ 8GB memory)

Collecting simulation statistics

ƒ The reason for performing timing simulation is to collect

timing-related or timing-sensitive information

  • E.g., IPC, average # of cycles for memory accesses, on-chip network contention, …

CS2410: Computer Architecture (^) University of Pittsburgh

ƒ During what period of program execution do you want to

collect statistics from?

  • Initialization phase
  • Main phases
  • Wrap-up phase

Collecting simulation statistics

whole execution w/ detailed simulation t=

N instructions t=T

(a) t=TM

M instructions

CS2410: Computer Architecture (^) University of Pittsburgh

(b) (^) t=T K +TSKIPPED+TWARMUP

K instructions details skipped

(c)

representative phases t=TACTUAL+TSKIPPED+TWARM-UP

(d)

sampled periods

t=TACTUAL+TSKIPPED+TWARM-UP

Simics

ƒ It’s a full system simulator supporting multiple platforms

  • E.g., x86, Sun, ARM, …

ƒ It features a nice interface for microarchitecture modeling

  • Simics does simulation and you decide timing of events

CS2410: Computer Architecture (^) University of Pittsburgh

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  • It has implemented cache memory

ƒ It has become a de-facto simulator in the architecture

research community

ƒ We will use this tool for some of our programming

assignments