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SWITCHING THEORY AND LOGIC DESIGN

COURSEFILE

Coursefile contents :

1. Cover Page

2. Syllabus copy

3. Vision of the department

4. Mission of the department

5. PEOs and POs

6. Course objectives and outcomes

7. Brief note on the importance of the course and how it fits in to the curriculum

8. Prerequisites

9. Instructional Learning Outcomes

10.Course mapping with PEOs and POs

11.Class Time Table

12.Individual Time Table

13.Lecture schedule with methodology being used/adopted

14.Detailed notes

15.Additional/missing topics

16.University previous Question papers

17. Question Bank

18.Assignment topics

19.Unit wise questions

20.Tutorial problems

21.Known gaps

22.Discussion topics

23.References, Journals, websites and E-links

24. Quality measurement Sheets

a. course and survey

b. Teaching evaluation

25. Student List
26. GroupWise Student List for discussion topics

2. Syllabus copy

JAWAHARLAL NEHRU TECHNOLOGIVAL UNIVERSITY HYDERABAD

II Year B.Tech. EEE – II Sem L T/ P/ D C 4 -/ - / - 4

SWITCHING THEORY AND LOGIC DESIGN

UNIT I

NUMBER SYSTEMS AND BOOLEAN ALGEBRA AND SWITCHING FUNCTIONS: Number

systems : Base Conversion Methods, Complement of Numbers, Codes - Binary codes, Binary Coded

Decimal code and its properties, Unit distance codes, Alpha Numeric codes, Error detecting and

correcting codes.

Boolean Algebra : Basic theorems and properties

Switching Functions: Canonical and Standard forms, Algebraic simplification of digital logic gates,

Properties of XOR gates , Universal gates, Multilevel NAND/NOR realizations.

UNIT II

MINIMIZATION AND DEGIN OF COMBINATIONAL CIRCUITS: Introduction, The

Minimization with theorem, The Karnaugh Map Method, Five and Six variable Maps, Prime and

Essential Implications, Don’t care Map entries, Using the maps for Simplifying, Tabular method, Partially

specified Expressions, Multi-Output Minimization, Minimization and combinational Design, Arithmetic

Circuits, Comparator, Multiplexers, Code Converters, Wired Logic, Tristate Bus system, Practical

Aspects related to Combinational Logic Design, Hazards and Hazard Free Relations.

UNIT III

SEQUENCTIAL MACHINES FUNDAMENTALS: Introduction, Basic Architectural Distinctions

between Combinational and Sequential circuits, the Binary Cell, Fundamentals of Sequential Machine

Operation, The Flip-Flop, The D- Latch Flip-Flop, the Clocked T Flip-Flop, the clocked J-K Flip-Flop,

Design of a clocked Flip-flop, conversion from one Type of Flip-Flop to another, Timing and Triggering

considerations, Clock skew.

UNIT IV

SEQUENTIAL CIRCUITS DESIGN AND ANALYSIS: Introduction, State diagram, Analysis of

Synchronous Sequential Circuits, Approaches to the Design of Synchronous sequential Finite State

Machines, Design Aspects, State Reduction, Design Steps, Realization using Flip-Flops.

Counters: Design Of Single Mode Counters; Ripple Counter, Ring Counter, Shift Register, Shift

Register Sequences, Ring Counter using Shift Register.

UNIT V

SEQUENTIAL CIRCUITS : Finite state machine-capabilities and limitations, Mealy and Moore

models-minimization of completely specified and incompletely specified sequential machines, Partition

techniques and Merger chart methods-concept of minimal cover table.

ALGOROTHIMIC STATE MACHINES : Salient features of the ASM chart-Simple examples-System

design using data path and control subsystems-control implementations-examples of Weighing machine

and Binary multiplier.

TEXT BOOKS :

1. Switching & Finite Automata theory – Zvi Kohavi and Neeraj K Jha, ,3rd^ Edition, Cambridge.

2. Digital Design – Morris Mano, PHI, 3rd Edition.

REFERENCE BOOKS:

1. Introduction to Switching Theory and Logic Design – Fredriac J Hill, Gerald R Peterson, 3rd^ Edition,

John Willey and Sons Inc,

2. Digital Fundamentals – A Systems approach – Thomas L Floyd, Pearson, 2013.

3. Digital Logic Design – Ye Brian and HoldsWorth, Elsevier

4. Fundamentals of Logic Design – Charles H. Roth, Thomson Publications, 5th Edition, 2004

5. Digital Logic Applications and Design – John M. Yarbrough, Thomson Publications, 2006

6. Digital logic and state machine design – Comer, 3rd, Oxford 2013.

5.1 PROGRAM EDUCATIONAL OBJECTIVES

PEO 1. Graduates will excel in professional career and/or higher education by acquiring knowledge in

Mathematics, Science, Engineering principles and Computational skills.

PEO 2. Graduates will analyze real life problems, design Electrical systems appropriate to the requirement that

are technically sound, economically feasible and socially acceptable.

PEO 3.Graduates will exhibit professionalism, ethical attitude, communication skills, team work in their

profession, adapt to current trends by engaging in lifelong learning and participate in Research & Development.

5.2 PROGRAM OUTCOMES

The Program Outcomes of UG in Electrical and Electronics Engineering are as follows

PO 1. An ability to apply the knowledge of Mathematics, Science and Engineering in Electrical and

Electronics Engineering.

PO 2. An ability to design and conduct experiments pertaining to Electrical and Electronics Engineering.

PO 3. An ability to function in multidisciplinary teams

PO 4. An ability to simulate and determine the parameters such as nominal voltage current, power and

associated attributes.

PO 5. An ability to identify, formulate and solve problems in the areas of Electrical and Electronics

Engineering.

PO 6. An ability to use appropriate network theorems to solve electrical engineering problems.

PO 7. An ability to communicate effectively.

PO 8. An ability to visualize the impact of electrical engineering solutions in global, economic and societal

context.

PO 9. Recognition of the need and an ability to engage in life-long learning.

PO 10 An ability to understand contemporary issues related to alternate energy sources.

PO 11 An ability to use the techniques, skills and modern engineering tools necessary for Electrical

Engineering Practice.

PO 12 An ability to simulate and determine the parameters like voltage profile and current ratings of

transmission lines in Power Systems.

PO 13 An ability to understand and determine the performance of electrical machines namely speed, torque,

efficiency etc.

PO 14 An ability to apply electrical engineering and management principles to Power Projects.

8. PREREQUISITES:

1. Set theory (Mathematics)
2. Basic logic operations like bit wise operations, Shift operations, flow charts, ASCII codes, etc.

(Computer Programming)

9. INSTRUCTIONAL LEARNING OUTCOMES

UNIT-I

Sl No.

Module Outcomes

Number System and Boolean Algebra and Switching Functions

Able to Know different number systems 2 Able to do Conversion Operations between different number systems 3 Able to know basic theorems and properties used in Boolean algebra 4 Designs different logic circuits using different logic gates 5 Designs multilevel realization functions UNIT-II

Sl No.

Module Outcomes

Minimization and Design of Combinational Circuits

Able to get basic information in the design of combinational circuits 2 Able to solve and analyze Karnaugh Maps 3 Designs Combinational multi level circuits 4 Able to know the operation of Multiplexers and other arithmetic circuits 5 Can perform practical’s with combinational logic circuits UNIT-III

Sl No.

Module Outcomes

Sequential machines fundamentals

Able to identify architectural differences in combinational and sequential circuits 2 Able to design sequential circuits for machine operation 3 Able to design Clocked flip flops 4 Makes use of timing and triggering circuits with sequential logics UNIT-IV

Sl No.

Module Outcomes

Sequential circuit design and analysis

Able to draw state diagrams 2 Able to analyze synchronous sequential circuits 3 Designs sequential finite state machines 4 Designs different types of counters and registers

UNIT-V

Sl No.

Module Outcomes

Sequential circuits and algorithmic state machines

Able to identify capabilities and limitations of finite state machine 2 Able to know Mealy and Moore minimization models 3 Able to know partition techniques and merger chart methods 4 Able to know about concept of minimal cover table 5 Able to design any system using data path and controls subsystems 6 Knows the control logics of weighing machine and binary multiplier

10. Course mapping with PEOs and POs

Mapping of Course with Programme Educational Objectives:

S.No Course

component

code course Semester PEO 1 PEO 2 PEO 3

1

Digital Electronics

STLD II √ √

Mapping of Course outcomes with Programme outcomes:

*When the course outcome weightage is < 40%, it will be given as moderately correlated (1).

*When the course outcome weightage is >40%, it will be given as strongly correlated (2).

POs 1 2 3 4 5 6 7 8 9 10 11 12 13

Digital Systems

STLD (^) 2 2 2 1 2 1 1 2 2 2

CO 1 :

a. Explain different

Number Systems,

Codes and their

Conversions.

b. Explain Error

Detecting & Error

Correcting Codes

c. Solve typical

problems on the above.

2 2 2 1 2 1 1 2 2 2

namely, PROM, PLA

and PAL.

CO 6 :

Design different types

of synchronous

sequential logic

circuits.

2 2 2 1 2 1 1 2 2 2

CO 7 :

Design fundamental

mode and pulse mode

asynchronous

sequential machines.

2 2 2 1 2 1 1 2 2 2

CO 8 :

Design digital systems

using ASM Charts.

2 2 2 2 1 1 2 2 2

Geethanjali College of Engineering & Technology

Department of Electrical & Electronics Engineering

Year/Sem/Sec: II-B. Tech-II Sem(Version-0) Room No: Acad Year 2015-16, WEF: 07- 12 - 2015

Class Teacher: Mrs.D.Radhika

Time 09.30 10.20-^ 10.20 11.10-^ 11.10 12.00- 12.00-12.50 12.50 13.30- 13.30-14.20 14.20-15.10 15.10-16.

Period 1 2 3 4

LUNCH

5 6 7

Monday EC NT EM-II PS-I MEFA

CACHE/SPORTS/ LIBRARY/ MENTORING

Tuesday STLD NT CRT MEFA EM-II EC

Wednesday PS-I STLD NT EM-II ECS/EM-I LAB

Thursday NT EM-II PS-I STLD ECS/EM-I LAB*

Friday EM-II EC STLD NT MEFA EC PS-I

Saturday STLD PS-I EC MEFA GENDER SENSITIZATION

No Subject(T/P) Faculty Name Mobile No Periods/Week

1 Network Theory (A40213) Dr.S.Radhika 4+1-Periods*

2 Switching Theory and Logic Design (A40407) Mrs.D.Radhika 4+1-Periods*

3 Electrical Machines-II (A40212) Mr.G.Srikanth/Mrs.D.Radhika 4+1-Periods 4 Power Systems-I (A40214) Mr.N.Santhinath 4+1-Periods 5 Manegerial Eeconomics and Financial Mrs.B.P.S.Jyothi 4 - Periods**

Analysis (A40010)

6 Electronic Circuits (A40413) Mrs.B.Mamatha 4+1-Periods* (^7) GENDER SENSITIZATION Mr.N.V.Bharadwaj 3 - Periods

(^8) Electrical Machines-I LAB (A40287) Santhinath/Rakesh/Srikanth/NV Bharadwaj 3+3-Periods

9 Electrical Circuits and Simulation LAB (A40286) D.Krishna/D.Radhika/Dr.S.Radhika (^) Periods3+3-

(^10) CACHE/LIBRARY/SPORTS/MENTORING PERIODS^2

11 Campus Recruitment Training (^) Periods^2

*- Tutorial

Date: 3/12/2015 Dept. Coord:___________

HOD:_______________DeanAcad:_______________Principal:_________________

13. Lecture schedule with methodology being used / adopted

SL.No. Unit

No.

Total

No. of

Periods

Week

No.

Topic to be covered

in One lecture

Regular/ Additional

Teaching aids used LCD/OHP/BB

Remarks

1 I WEEK 1 Introduction to switching theory and logic design

Regular BB

2 Number Systems Regular BB

3 Number base conversions Regular BB

4 Complement of numbers Regular BB

TUTORIAL

5 Binary Codes, Binary Coded Decimal Code and its properties

Regular BB

6 WEEK 2 Unit Distance Codes, Alpha Numeric Codes

Regular BB

7 Error Detecting & correcting codes

Regular BB

8 Tutorial class Regular BB

8 Fundamental & postulates of Boolean algebra

Regular BB

9 Theorems and properties Regular BB

10 WEEK 3 Switching functions Regular BB

31 TUTORIAL Regular BB

32 III WEEK 7 Sequential Machine Fundamentals - introduction

Regular BB

33 Basic architectural distinctions between combinational and sequential circuits

Regular BB

34 Binary Cell, fundamentals of sequential machine operation

Regular BB

35 Flip-flop and types of flip- flops

Regular BB

36 D- Latch Flip-flop Regular BB

37 WEEK 8 Tutorials Regular BB

38 Regular BB

39 BB

40 VI 9

41 Regular BB

42 WEEK 9 Regular BB

43 Regular BB

44 Regular BB

45 Additional BB

46 BB

47 B.TECH I-MID INTERNAL EXAMINATIONS

48 WEEK 10

49 V Regular BB

50 Regular BB

51 Regular BB

52 Regular BB

53 WEEK 11 (15TH^ SEP TO 21ST SEP)

Regular BB

54 BB

55

56 Regular BB

57 Regular BB

58 WEEK 12 Regular BB

59 Regular BB

60 Additional BB

61 BB

62 BB

63

14. Detailed Notes

Digital and Analog Signals

Signals carry information and are defined as any physical quantity that varies with time, space, or any other independent variable. For example, a sine wave whose amplitude varies with respect to time or the motion of a particle with respect to space can be considered as signals. A system can be defined as a physical device that performs an operation on a signal. For example, an amplifier is used to amplify the input signal amplitude. In this case, the amplifier performs some operation(s) on the signal, which has the effect of increasing the amplitude of the desired information-bearing signal. Signals can be categorized in various ways; for example discrete and continuous time domains. Discrete-time signals are defined only on a discrete set of times. Continuous-time signals are often referred to as continuous signals even when the signal functions are not continuous; an example is a square-wave signal.

Figure 1a: Analog Signal Figure 1b : Digital Signal Another category of signals is discrete-valued and continuous-valued or otherwise known as digital and analog signals. Digital signals are discrete-valued and analog signals are continuous electrical signals that vary in time as shown in Figure 1 (a) and (b). Analog devices and systems process signals whose voltages or other quantities vary in a continuous manner.

Introduction Number systems provide the basis for all operations in information processing systems. In a number system the information is divided into a group of symbols; for example, 26 English letters, 10 decimal digits etc. In conventional arithmetic, a number system based upon ten units (0 to 9) is used. However, arithmetic and logic circuits used in computers and other digital systems operate with only 0's and 1's because it is very difficult to design circuits that require ten distinct states. The number system with the basic symbols 0 and 1 is called binary. ie. A binary system uses just two discrete values. The binary digit (either 0 or 1) is called a bit. A group of bits which is used to represent the discrete elements of information is a symbol. The mapping of symbols to a binary value is known a binary code. This mapping must be unique. For example, the decimal digits 0 through 9 are represented in a digital system with a code of four bits. Thus a digital system is a system that manipulates discrete elements of information that is represented internally in binary form.

Decimal Numbers The invention of decimal number system has been the most important factor in the development of science and technology. The decimal number system uses positional number representation, which means that the value of each digit is determined by its position in a number. The base, also called the radix of a number system is the number of symbols that the system contains. The decimal system has ten symbols: 0,1,2,3,4,5,6,7,8,9. In other words, it has a base of 10. Each position in the decimal system is 10 times more significant than the previous position. The numeric value of a decimal number is determined by multiplying each digit of the number by the value of the position in which the digit appears and then adding the products. Thus the number 2734 is interpreted as

Here 4 is the least significant digit (LSD) and 2 is the most significant digit (MSD). In general in a number system with a base or radix r, the digits used are from 0 to r-1 and the number can be represented as

Equation (1) is for all integers and for the fractions (numbers between 0 and 1), the following equation holds.

Thus for decimal fraction 0.

Binary Numbers The binary number has a radix of 2. As r = 2, only two digits are needed, and these are 0 and 1. Like the decimal system, binary is a positional system, except that each bit position corresponds to a power of 2 instead of a power of 10. In digital systems, the binary number system and other number systems closely related to it are used almost exclusively. Hence, digital systems often provide conversion between decimal and binary numbers. The decimal value of a binary number can be formed by multiplying each power of 2 by either 1 or 0 followed by adding the values together. Example : The decimal equivalent of the binary number 101010.

In binary r bits can represent symbols. e.g. 3 bits can represent up to 8 symbols, 4 bits for 16 symbols etc. For N symbols to be represented, the minimum number of bits required is the lowest integer 'r'' that satisfies the relationship.

e.g. if N = 26, minimum r is 5 since.

Octal Numbers Digital systems operate only on binary numbers. Since binary numbers are often very long, two shorthand notations, octal and hexadecimal, are used for representing large binary numbers. Octal systems use a base or radix of 8. Thus it has digits from 0 to 7 (r-1). As in the decimal and binary systems, the positional valued of each digit in a sequence of numbers is

fixed. Each position in an octal number is a power of 8, and each position is 8 times more significant than the previous position.

Example : The decimal equivalent of the octal number 15.2.

Hexadecimal Numbers The hexadecimal numbering system has a base of 16. There are 16 symbols. The decimal digits 0 to 9 are used as the first ten digits as in the decimal system, followed by the letters A, B, C, D, E and F, which represent the values 10, 11,12,13, and 15 respectively. Table 1 shows the relationship between decimal, binary, octal and hexadecimal number systems.

Decimal Binary Octal Hexadecimal 0 0000 0 0 1 0001 1 1 2 0010 2 2 3 0011 3 3 4 0100 4 4 5 0101 5 5 6 0110 6 6 7 0111 7 7 8 1000 10 8 9 1001 11 9 10 1010 12 A 11 1011 13 B 12 1100 14 C 13 1101 15 D 14 1110 16 E 15 1111 17 F

Hexadecimal numbers are often used in describing the data in computer memory. A computer memory stores a large number of words, each of which is a standard size collection of bits. An 8-bit word is known as a Byte. A hexadecimal digit may be considered as half of a byte. Two hexadecimal digits constitute one byte, the rightmost 4 bits corresponding to half a byte, and the leftmost 4 bits corresponding to the other half of the byte. Often a half-byte is called nibble. If "word" size is n bits there are 2n possible bit patterns so only 2n possible distinct numbers can be represented. It implies that all possible numbers cannot be represent and some of these bit patterns (half?) to represent negative numbers. The negative numbers are generally represented with sign magnitude i.e. reserve one bit for the sign and the rest of bits are interpreted directly as the number. For example in a 4 bit system, 0000 to 0111 can be used to positive numbers from +0 to +2n-^1 and represent 1000 to 1111 can be used for negative numbers from - 0 to - 2 n-^1. The two possible zero's redundant and also it can be seen that such representations are arithmetically costly. Another way to represent negative numbers are by radix and radix-1 complement (also called r's and (r-1)'s). For example

• k is represented as Rn^ - k. In the case of base 10 and corresponding 10's complement with n=2, 0 to 99 are the possible numbers. In such a system, 0 to 49 is reserved for positive numbers and 50 to 99 are for positive numbers. Examples: +3 = +
• 3 = 10 2 - 3 = 97 2's complement is a special case of complement representation. The negative number - k is equal to 2 n - k. In 4 bits system, positive numbers 0 to 2n-^1 is represented by 0000 to 0111 and negative numbers - 2 n-^1 to - 1 is represented by 1000 to 1111. Such a representation has only one zero and arithmetic is easier. To negate a number complement all bits and add 1 Example: 119 10 = 01110111 2 Complementing bits will result