Topology Embedding: Techniques and Metrics for Mapping Networks, Slides of Parallel Computing and Programming

Various techniques for embedding one topology into another, focusing on issues related to performance metrics such as dilation, congestion, and expansion. It also covers the embedding of sparse networks into denser networks and vice versa, using examples like linear array into a hypercube and mesh into a hypercube. Additionally, it explains mapping techniques for graphs and their metrics, including congestion, dilation, and expansion.

Typology: Slides

2011/2012

Uploaded on 07/23/2012

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Topology Embedding

Topologies Embedding Issues

•^

Performance Metric– Dilation– Congestion– Expansion

•^

Embedding Sparser networks in Denser Networks– Linear Array into a Mesh– Linear Array into a Hypercube– Mesh into a Hypercube– Simultaneous Multiple topology embedding

•^

Embedding Denser Networks in Sparser Networks– Mesh into a Linear Array– Hypercube into a Mesh– Hypercube in Linear Array

Mapping Techniques for Graphs: Metrics •^

When mapping a graph

G(V,E)

into

G’(V’,E’),

the

following metrics are important:

•^

The maximum number of edges mapped onto any edgein^

E’

is called the

congestion

of the mapping.

•^

The maximum number of links in

E’

that any edge in

E

is

mapped onto is called the

dilation

of the mapping.

•^

The ratio of the number of nodes in the set

V’

to that in

set

V

is called the

expansion

of the mapping.

Embedding a Linear Array

into a Hypercube using Gray Code ( a) A three-bit reflected Gray code ring; and (b) its embedding into a

three-dimensional hypercube.

1−bit Gray code

2−bit Gray code

3−bit Gray code

3−D hypercube

8−processor ring

Reflectalong thisline

(a) 110

010 000

011 001

111 101

(b) 100

Embedding a Mesh into a Hypercube using K-map (a) A 4

×^ 4 mesh illustrating the mapping of mesh nodes to the nodes in a four-dimensionalhypercube; and (b) a 2

×^ 4 mesh embedded into a three-dimensional hypercube.

Once again, the congestion, dilation, and expansion of the mapping is 1.

Processors in a column haveidentical two least−significant bits

Processors in a row have identicaltwo most−significant bits

(a)

(b)

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Embedding a Mesh into a Linear Array

•^

Since a mesh has more edges than a linear array, wewill not have an optimal congestion/dilation mapping.

•^

We first examine the mapping of a linear array into amesh and then invert this mapping.

•^

This gives us an optimal mapping (in terms ofcongestion).

Embedding a Hypercube into a 2-D Mesh •^

Each

node subcube of the hypercube is mapped to

a^

node row of the mesh.

•^

This is done by inverting the linear-array to hypercubemapping.

•^

Embedding a Hypercube into a Array This can be shown to be an optimal mapping.

Embedding a Hypercube into a 2-D Mesh: Example

Embedding a hypercube into a 2-D mesh.

P = 32 (b)

P = 16 (a)

P= 64