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Inside RAM
Two-level addressing
Consider a 4M x 1 bit RAM. It will apparently need a 22- to-4M decoder. 4 million output lines will make it complex! Complex! Tw0-level addressing simplifies it.
A21-A
D (^) in Dout
In two-level addressing, the memory cells for any bit position are logically arranged as a two-dimensional array. 11 address lines are used to select a row, and 11 address lines are used to select a column. This reduces the number of output lines of the decoders from 4M to 2048 + 2048 = 4096 only.
These are Dflip-flops
22 โ to-2 22 decoder
A 3-to-8 decoder for row A 3-to-8 decoder for the column (8+8=16 wires lead to the memory)
A 6-to-64 decoder will decode the address (64 wires lead to the memory cells)
Basic idea
1 2 3
60 61 62 63
0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
Modified scheme with shared address lines
(A21-A11) and (A10-A0) are fed to the address lines one after another
Dynamic RAM
Word line
Bit line (data)
Ground
A โ1โ in the word line closes the switch, and the input data through the bit line charges the capacitor. During reading, the voltage on the capacitor is sensed through the bit line to determine if the content is a โ1โ or a โ0โ.
To safeguard the leakage of the capacitor, it is periodically refreshed (An entire row in one cycle).
Very high packing density, but slow (45-65 ns access time) DRAM is a good choice for the main memory.
A bit is stored here as charge on the capacitor
ROM and PLA and FPGA
ROM = Read Only Memory PLA = Programmable Logic Array FPGA = Field Programmable Gate Array
Here a ROM that is a solid-state device (not an electro- mechanical device like a CD-ROM). Its contents can be randomly accessed, very similar to RAM, with the exception that it contains fixed codes/data that cannot be erased or overwritten by the programmer.
Needs special equipment to write data into it. Some can be programmed only once, and often done at the factory. In the programmable variety of ROMs (PROM), the contents can be erased (by ultraviolet radiation or electrical pulses as in EEPROM) and reprogrammed.
Examples
Flash Memory is a form of EEPROM (Electrically Erasable Programmable ROM). Extensively used in USB thumb drives, memory sticks etc. Smart Media and Compact Flash are used as electronic films in digital cameras.
FPGA (Field Programmable Gate Array)
FPGA is a semiconductor device containing programmable logic components and programmable interconnects. Logic blocks can be programmed to perform the function of basic logic gates such as AND, and XOR, or more complex combinational functions such as decoders or mathematical functions. In most FPGAs, the logic blocks also include memory elements, which may be simple flip- flops or more complete blocks of memory. It is a useful building block for prototyping hardware design
