Computer Systems Design Exam, ELTR 8007, Cork Institute of Technology, 2008/09, Exams of Digital Systems Design

An examination paper from the cork institute of technology, ireland, for the module computer systems design (eltr 8007) in the bachelor of engineering (honours) in electronic systems engineering program. Instructions, three questions with sub-questions, and marks distribution for the semester 1 examinations held in winter 2008. The questions cover topics such as von neumann machine architecture, pipelining, memory management, interrupt systems, and parallel processing.

Typology: Exams

2012/2013

Uploaded on 03/30/2013

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CORK INSTITUTE OF TECHNOLOGY
INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ
Semester 1 Examinations 2008/09
Module Title: Computer Systems Design
Module Code: ELTR 8007
School: Electrical & Electronic Engineering
Programme Title: Bachelor of Engineering (Honours) in Electronic Systems
Engineering - Award
Programme Code: EELES_8_Y4
External Examiner(s): Mr. David Denieffe and Dr. Paula O Sullivan
Internal Examiner(s): Mr. F. O’Reilly
Instructions: Answer any THREE questions.
All questions carry equal marks
Duration: 2 Hours
Sitting: Winter 2008
Requirements for this examination:
Note to Candidates: Please check the Programme Title and the Module Title to ensure
that you have received the correct examination paper.
If in doubt please contact an Invigilator.
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CORK INSTITUTE OF TECHNOLOGY

INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ

Semester 1 Examinations 2008/

Module Title: Computer Systems Design

Module Code: ELTR 8007

School: Electrical & Electronic Engineering

Programme Title: Bachelor of Engineering (Honours) in Electronic Systems Engineering - Award

Programme Code: EELES_8_Y

External Examiner(s): Mr. David Denieffe and Dr. Paula O Sullivan Internal Examiner(s): Mr. F. O’Reilly

Instructions: Answer any THREE questions. All questions carry equal marks

Duration: 2 Hours

Sitting: Winter 2008

Requirements for this examination:

Note to Candidates: Please check the Programme Title and the Module Title to ensure that you have received the correct examination paper. If in doubt please contact an Invigilator.

Q1 (a) List three fundamental principles of a Von Neumann machine architecture. Explain the benefits they bring and how/where these have appeared in the modern computer/programming model. [ 10 marks ]

(b) Explain how pipelining can create difficulties in memory access in a Von Neumann machine and how this can be tackled effectively. How is this solution implemented in modern micro-processors, (give examples). [ 10 marks ]

(c) Describe briefly two(2) of the following, using diagrams where appropriate.

  • Control and Data Hazards and their solutions
  • Superscalar Execution, benefits and assisting techniques.
  • Vector Processors and processing cores. . [14 marks]

[ Total: 34 marks]

Q2 (a) Describe using diagrams how a paged based memory management system can translate a virtual space of 2048MB (31 bit) into a physical space of 256 MB ( bits). Take into account that the average active code/data block is 256 KB in size for this system. [14 marks]

(b) Using diagrams describe how a high-end server type machine, with 4 commodity 32 bit processors (32 bit registers but 36 bit addresses for memory) (e.g. Sun UltraSparc or Pentium Xeon), would typically be organised, for good flexibility and performance. It will have 8-16 GB RAM. State and justify the memory models used and what name might commonly be given to this type of machine or organisation. [10 marks]

(c) A paging based virtual memory system has the following utilisations. CPU Utilisation 20% Paging Disk 95% Other I/O 5%

Explain what is happening and what causes it. What steps if any do you think could be taken to improve CPU utilisation? [10 marks]

[ Total: 34 marks]