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CSE410, Winter 2017
L22: Virtual Memory I
Virtual Memory I CSE 410 Winter 2017 Instructor:
Teaching Assistants:
Justin Hsia
Kathryn Chan, Kevin Bi, Ryan Wong, Waylon Huang, Xinyu Sui
Amazon AWS S3 outage is breaking things for a lot of websites and apps Amazonās S3 web-based storage service is experiencing widespread issues, leading toservice thatās either partially or fully broken on websites, apps and devices upon which itrelies. Connected lightbulbs, thermostats and other IoT hardware is also being impacted,with many unable to control these devices as a result of the outage.Itās used by 0.8 percent of the top 1 million websites, which isactually quite a bit smaller than CloudFlare, which is used by 6.2percent of the top 1 million websites globally ā and yet itās stillhaving this much of an effect. ā¢^ https://techcrunch.com/2017/02/28/amazonāawsās3āoutageāisābreakingāthingsāforāaālotāofāwebsitesāandāapps/
CSE410, Winter 2017
L22: Virtual Memory I
Administrivia^ ļ¶^ Lab 4 due next Tuesday (3/7)^ ļ¶^ Homework 5 released today, due next Thursday (3/9)^ ļ¶^ Optional Section: Processes, VM Intro^ ļ¶^ Final Exam:
Tuesday, March 14 @ 2:30pm (MGH 241) ļ§^ Review Session: Sunday, March 12 @ 1:30pm in SAV 264 ļ§^ Cumulative (midterm clobber policy applies) ļ§^ TWO doubleāsided handwritten 8.
11ā cheat sheets
-^ Recommended that you reuse or remake your midterm cheat sheet
CSE410, Winter 2017
L22: Virtual Memory I
Virtual Memory (VM*)^ ļ¶^ Overview and motivation^ ļ¶^ VM as a tool for caching^ ļ¶^ Address translation^ ļ¶^ VM as a tool for memory management^ ļ¶^ VM as a tool for memory protection
*Not to be confused with āVirtual Machineā which is a whole other thing.
Warning:
Virtual memory is pretty complex, but crucial for understanding how processeswork and for debugging performance
CSE410, Winter 2017
L22: Virtual Memory I
Memory as we know it so farā¦ is
virtual!
ļ¶^ Programs refer to virtual memory addresses^ ļ§^ movq (%rdi),%rax^ ļ§^ Conceptually memory is just a very large array of bytes^ ļ§^ System provides private address space to each process ļ¶^ Allocation: Compiler and runātime system^ ļ§^ Where different program objects should be stored^ ļ§^ All allocation within single virtual address space ļ¶^ Butā¦^ ļ§^ We
probably
donāt have
w^2 bytes of physical memory
ļ§^ We^ certainly
donāt have
w^2 bytes of physical memory
for every process ļ§ Processes should not interfere with one another^ ā¢^ Except in certain cases where they want to share code or data
0xFFāāāāāāF 0x00āāāāāā
CSE410, Winter 2017
L22: Virtual Memory I
Problem 2: Memory Management
Physical main memory
What goeswhere?
stackheap .text.data^ ā¦
Process 1Process 2Process 3ā¦ Process n
Each process hasā¦x
We have multipleprocesses:
CSE410, Winter 2017
L22: Virtual Memory I
Problem 3: How To Protect
Physical main memory
Process^
i
Process^
j
Problem 4: How To Share?
Physical main memory
Process^
i
Process^
j
CSE410, Winter 2017
L22: Virtual Memory I
Indirection^ ļ¶^ āAny problem in computer science can be solved by addinganother level of indirection.ā
āDavid Wheeler, inventor of the subroutine
ļ¶^ Without Indirection ļ¶^ With Indirection
P^
Thing
P^
Thing
What if I want to move Thing?
P1 P3 P1 P
NewThing^ NewThing
CSE410, Winter 2017
L22: Virtual Memory I
Indirection^ ļ¶^ Indirection
: The ability to reference something using a name, reference, or container instead of the value itself. A flexiblemapping between a name and a thing allows changing thething without notifying holders of the name.^ ļ§^ Adds some work (now have to look up 2 things instead of 1)^ ļ§^ But donāt have to track all uses of name/address (single source!) ļ¶ Examples:^ ļ§^ Phone system:
cell phone number portability
ļ§^ Domain Name Service (DNS):
translation from name to IP address
ļ§^ Call centers:
route calls to available operators, etc.
ļ§^ Dynamic Host Configuration Protocol (DHCP):
local network address
assignment
CSE410, Winter 2017
L22: Virtual Memory I
Address Spaces^ ļ¶^ Virtual address space: Set of
ąÆ”^ virtual addr
ļ§^ {0, 1, 2, 3, ā¦,
ā1}
ļ¶^ Physical address space: Set of
Ż physical addr
ļ§^ {0, 1, 2, 3, ā¦,
ā1}
ļ¶^ Every byte in main memory has:^ ļ§^ one physical address (PA)^ ļ§^ zero, one,
or more
virtual addresses (VAs)
CSE410, Winter 2017
L22: Virtual Memory I
Mapping^ ļ¶^ A virtual address (VA) can be mapped to either physicalmemory or disk^ ļ§^ Unused VAs may not have a mapping^ ļ§^ VAs from
different
processes may map to same location in memory/disk
Process 2ās VirtualAddress Space
PhysicalMemory Disk
Process 1ās VirtualAddress Space
āSwap Spaceā
CSE410, Winter 2017
L22: Virtual Memory I
A System Using Virtual Addressing
ļ¶^ Physical addresses are
completely invisible to programs
ļ§^ Used in all modern desktops, laptops, servers, smartphonesā¦ ļ§^ One of the great ideas in computer science
Main memory0: 1: Mā1:
MMU
Physical address(PA) Data (int/float)
CPU
Virtual address(VA)
CPU Chip
0x
0x4100^ Memory Management Unit
CSE410, Winter 2017
L22: Virtual Memory I
Why Virtual Memory (VM)?^ ļ¶^ Efficient use of limited main memory (RAM)^ ļ§^ Use RAM as a cache for the parts of a virtual address space^ ā¢
Some nonācached parts stored on disk ā¢ Some (unallocated) nonācached parts stored nowhere ļ§ Keep only active areas of virtual address space in memory ā¢ Transfer data back and forth as needed ļ¶^ Simplifies memory management for programmers^ ļ§^ Each process āgetsā the same full, private linear address space ļ¶^ Isolates address spaces (protection)^ ļ§^ One process canāt interfere with anotherās memory^ ā¢
They operate in
different address spaces
ļ§^ User process cannot access privileged information^ ā¢^ Different sections of address spaces have different permissions
CSE410, Winter 2017
L22: Virtual Memory I
or:^ Virtual Memory as DRAM Cache for Disk^ ļ¶^ Think of virtual memory as an array of
contiguous
bytes stored
on a disk ļ¶^ Then physical main memory is used as a
cache
for the
virtual memory array^ ļ§^ These ācache blocksā are called
pages^ (size is
Ż P ąµ 2
bytes)
māp^ PP 2ā Physical memory^ EmptyEmpty
VP 0VP 1 Uncached nāp^ VP 2ā Virtual memory^ UnallocatedCachedUncachedUnallocatedCachedUncached
PP 0PP 1 Empty
Cached
0 Nā
(^0) Mā
Virtual pages (VPs)āstored on diskā
Physical pages (PPs)cached in DRAM
CSE410, Winter 2017
L22: Virtual Memory I
Memory Hierarchy: Core 2 Duo
Disk
MainMemory
L2unifiedcache L1Iācache L1Dācache CPU^ Reg
2 B/cycle 8 B/cycle 16 B/cycle
1 B/30 cycles
Throughput:Latency:
100 cycles 14 cycles 3 cycles^
millions
~4 MB 32 KB
~8 GB^
~500 GB
Not drawn to scale
Miss Penalty(latency)^ 33x
Miss Penalty(latency)^ 10,000x
SRAM
Static Random Access Memory
DRAM
Dynamic Random Access Memory
