MIPS Exam Problems: Executing Code Fragments and Optimizing Machine Performance, Exams of Computer Science

Two mips exam problems. The first problem involves executing a given mips code fragment and determining the final register and memory values. The second problem deals with optimizing the performance of a 1 ghz machine by increasing the clock rate or adding branch prediction logic and an improved cache. The bonus question explores the maximum speedup that can be achieved by optimizing other parts of the machine.

Typology: Exams

Pre 2010

Uploaded on 02/10/2009

koofers-user-tjf-2
koofers-user-tjf-2 🇺🇸

10 documents

1 / 2

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
Example Exam Problems
1. (25 pts) Execute the following MIPS code fragment, showing the status of the register
file and memory when execution is completed. Use hexadecimal to show the values.
add $13,$0,$0
L1: addi $13,$13,0x04
lw $11,0x1C($13)
add $14,$11,$10
sw $14,0x20($13)
bne $12,$13,L1
BEFORE
Registers Memory
Address Value Address Value
$10 0x10 0x020 0x22
$11 0x14 0x024 0x30
$12 0x08 0x028 0x40
$13 0x28 0x02C 0x50
$14 0x1234 0x030 0x60
AFTER
Registers Memory
Address Value Address Value
$10 0x10 0x020 0x22
$11 0x32 0x024 0x32
$12 0x08 0x028 0x42
$13 0x08 0x02C 0x50
$14 0x42 0x030 0x60
2. (20 pts) You wish to speed up a 1 GHz machine that spends 80% of its clock cycles
on arithmetic instructions, 10% on load/store, and 10% on branch/jump. Given your
budget, you have two choices. You can increase the overall clock rate to 1.1 GHz, or
you can add branch prediction logic and an improved cache to reduce the
branch/jump and load/store times to half their original values. Which will result in a
faster machine? Why?
1.1 GHz will cause a speedup of 1.1x
The improved logic will cause the time to decrease from 100
units to 80 + 10/2 + 10/2 = 90, so the speedup is 100/90 =
1.11x, so this is better.
pf2

Partial preview of the text

Download MIPS Exam Problems: Executing Code Fragments and Optimizing Machine Performance and more Exams Computer Science in PDF only on Docsity!

Example Exam Problems

  1. (25 pts) Execute the following MIPS code fragment, showing the status of the register file and memory when execution is completed. Use hexadecimal to show the values.

add $13,$0,$ L1: addi $13,$13,0x lw $11,0x1C($13) add $14,$11,$ sw $14,0x20($13) bne $12,$13,L

BEFORE

Registers Memory Address Value Address Value $10 0x10 0x020 0x $11 0x14 0x024 0x $12 0x08 0x028 0x $13 0x28 0x02C 0x $14 0x1234 0x030 0x

AFTER

Registers Memory Address Value Address Value $10 0x10 0x020 0x

$11 0x32 0x024 0x

$12 0x08 0x028 0x

$13 0x08 0x02C 0x

$14 0x42 0x030 0x

  1. (20 pts) You wish to speed up a 1 GHz machine that spends 80% of its clock cycles on arithmetic instructions, 10% on load/store, and 10% on branch/jump. Given your budget, you have two choices. You can increase the overall clock rate to 1.1 GHz, or you can add branch prediction logic and an improved cache to reduce the branch/jump and load/store times to half their original values. Which will result in a faster machine? Why?

1.1 GHz will cause a speedup of 1.1x The improved logic will cause the time to decrease from 100 units to 80 + 10/2 + 10/2 = 90, so the speedup is 100/90 = 1.11x, so this is better.

BONUS. (5 pts) For the machine in question 5, suppose that the load/store time is fixed based on cache and memory access time, independent of the clock rate. What is the maximum speedup that can be achieved over the original 1 GHz machine, speeding up other parts of the machine as much as you want? Show your calculations.

80/inf + 10/inf + 10 = 10, so the speedup is 100/10 = 10x.