MIPS Exam Problems: Solving MIPS Code Fragments and Optimizing Machine Performance, Exams of Computer Science

Two mips exam problems aimed at testing the understanding of mips assembly language and computer architecture. The first problem asks to execute a given mips code fragment and show the final register and memory values. The second problem presents a machine optimization scenario, where the goal is to determine the most effective way to increase the machine's performance based on given constraints. The bonus question further explores the potential maximum speedup that can be achieved by optimizing other parts of the machine.

Typology: Exams

Pre 2010

Uploaded on 02/10/2009

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Example Exam Problems
1. (25 pts) Execute the following MIPS code fragment, showing the status of the register
file and memory when execution is completed. Use hexadecimal to show the values.
add $13,$0,$0
L1: addi $13,$13,0x04
lw $11,0x1C($13)
add $14,$11,$10
sw $14,0x20($13)
bne $12,$13,L1
BEFORE
Registers Memory
Address Value Address Value
$10 0x10 0x020 0x22
$11 0x14 0x024 0x30
$12 0x08 0x028 0x40
$13 0x28 0x02C 0x50
$14 0x1234 0x030 0x60
AFTER
Registers Memory
Address Value Address Value
$10 0x020
$11 0x024
$12 0x028
$13 0x02C
$14 0x030
2. (20 pts) You wish to speed up a 1 GHz machine that spends 80% of its clock cycles
on arithmetic instructions, 10% on load/store, and 10% on branch/jump. Given your
budget, you have two choices. You can increase the overall clock rate to 1.1 GHz, or
you can add branch prediction logic and an improved cache to reduce the
branch/jump and load/store times to half their original values. Which will result in a
faster machine? Why?
BONUS. (5 pts) For the machine in question 5, suppose that the load/store time is fixed
based on cache and memory access time, independent of the clock rate. What is the
maximum speedup that can be achieved over the original 1 GHz machine, speeding up
other parts of the machine as much as you want? Show your calculations.

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Example Exam Problems

  1. (25 pts) Execute the following MIPS code fragment, showing the status of the register file and memory when execution is completed. Use hexadecimal to show the values.

add $13,$0,$ L1: addi $13,$13,0x lw $11,0x1C($13) add $14,$11,$ sw $14,0x20($13) bne $12,$13,L

BEFORE

Registers Memory Address Value Address Value $10 0x10 0x020 0x $11 0x14 0x024 0x $12 0x08 0x028 0x $13 0x28 0x02C 0x $14 0x1234 0x030 0x

AFTER

Registers Memory Address Value Address Value $10 0x

$11 0x

$12 0x

$13 0x02C

$14 0x

  1. (20 pts) You wish to speed up a 1 GHz machine that spends 80% of its clock cycles on arithmetic instructions, 10% on load/store, and 10% on branch/jump. Given your budget, you have two choices. You can increase the overall clock rate to 1.1 GHz, or you can add branch prediction logic and an improved cache to reduce the branch/jump and load/store times to half their original values. Which will result in a faster machine? Why?

BONUS. (5 pts) For the machine in question 5, suppose that the load/store time is fixed based on cache and memory access time, independent of the clock rate. What is the maximum speedup that can be achieved over the original 1 GHz machine, speeding up other parts of the machine as much as you want? Show your calculations.