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Two mips exam problems aimed at testing the understanding of mips assembly language and computer architecture. The first problem asks to execute a given mips code fragment and show the final register and memory values. The second problem presents a machine optimization scenario, where the goal is to determine the most effective way to increase the machine's performance based on given constraints. The bonus question further explores the potential maximum speedup that can be achieved by optimizing other parts of the machine.
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add $13,$0,$ L1: addi $13,$13,0x lw $11,0x1C($13) add $14,$11,$ sw $14,0x20($13) bne $12,$13,L
BEFORE
Registers Memory Address Value Address Value $10 0x10 0x020 0x $11 0x14 0x024 0x $12 0x08 0x028 0x $13 0x28 0x02C 0x $14 0x1234 0x030 0x
AFTER
Registers Memory Address Value Address Value $10 0x
$11 0x
$12 0x
$13 0x02C
$14 0x
BONUS. (5 pts) For the machine in question 5, suppose that the load/store time is fixed based on cache and memory access time, independent of the clock rate. What is the maximum speedup that can be achieved over the original 1 GHz machine, speeding up other parts of the machine as much as you want? Show your calculations.