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This Document Gives a detailed explanation of the instruction set of the 8086 microprocessor.
Typology: Study notes
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MOV – MOV Destination, Source
The MOV instruction copies a word or byte of data from a specified source to a specified destination. The destination can be a register or a memory location. The source can be a register, a memory location or an immediate number. The source and destination cannot both be memory locations. They must both be of the same type (bytes or words). MOV instruction does not affect any flag.
MOV CX, 037AH Put immediate number 037AH to CX MOV BL, [437AH] Copy byte in DS at offset 437AH to BL MOV AX, BX Copy content of register BX to AX MOV DL, [BX] Copy byte from memory at [BX] to DL MOV DS, BX Copy word from BX to DS register MOV RESULT [BP], AX Copy AX to two memory locations; AL to the first location, AH to the second; EA of the first memory location is sum of the displacement represented by RESULTS and content of BP. Physical address = EA + SS. MOV ES: RESULTS [BP], AX Same as the above instruction, but physical address = EA + ES, because of the segment override prefix ES
XCHG – XCHG Destination, Source
The XCHG instruction exchanges the content of a register with the content of another register or with the content of memory location(s). It cannot directly exchange the content of two memory locations. The source and destination must both be of the same type (bytes or words). The segment registers cannot be used in this instruction. This instruction does not affect any flag.
XCHG AX, DX Exchange word in AX with word in DX XCHG BL, CH Exchange byte in BL with byte in CH XCHG AL, PRICES [BX] Exchange byte in AL with byte in memory at EA = PRICE [BX] in DS.
LEA – LEA Register, Source
This instruction determines the offset of the variable or memory location named as the source and puts this offset in the indicated 16-bit register. LEA does not affect any flag.
LEA BX, PRICES Load BX with offset of PRICE in DS LEA BP, SS: STACK_TOP Load BP with offset of STACK_TOP in SS LEA CX, [BX][DI] Load CX with EA = [BX] + [DI]
LDS – LDS Register, Memory address of the first word
This instruction loads new values into the specified register and into the DS register from four successive memory locations. The word from two memory locations is copied into the specified register and the word from the next two memory locations is copied into the DS registers. LDS does not affect any flag.
LDS BX, [4326] Copy content of memory at displacement 4326H in DS to BL, content of 4327H to BH. Copy content at displacement of 4328H and 4329H in DS to DS register. LDS SI, SPTR Copy content of memory at displacement SPTR and SPTR + 1
in DS to SI register. Copy content of memory at displacements SPTR + 2 and SPTR + 3 in DS to DS register. DS: SI now points at start of the desired string.
LES – LES Register, Memory address of the first word
This instruction loads new values into the specified register and into the ES register from four successive memory locations. The word from the first two memory locations is copied into the specified register, and the word from the next two memory locations is copied into the ES register. LES does not affect any flag.
LES BX, [789AH] Copy content of memory at displacement 789AH in DS to BL, content of 789BH to BH, content of memory at displacement 789CH and 789DH in DS is copied to ES register. LES DI, [BX] Copy content of memory at offset [BX] and offset [BX] + 1 in DS to DI register. Copy content of memory at offset [BX] + 2 and [BX] + 3 to ES register.
ADD – ADD Destination, Source ADC – ADC Destination, Source
These instructions add a number from some source to a number in some destination and put the result in the specified destination. The ADC also adds the status of the carry flag to the result. The source may be an immediate number, a register, or a memory location. The destination may be a register or a memory location. The source and the destination in an instruction cannot both be memory locations. The source and the destination must be of the same type (bytes or words). If you want to add a byte to a word, you must copy the byte to a word location and fill the upper byte of the word with 0’s before adding. Flags affected: AF, CF, OF, SF, ZF.
ADD AL, 74H Add immediate number 74H to content of AL. Result in AL ADC CL, BL Add content of BL plus carry status to content of CL ADD DX, BX Add content of BX to content of DX ADD DX, [SI] Add word from memory at offset [SI] in DS to content of DX ADC AL, PRICES [BX] Add byte from effective address PRICES [BX] plus carry status to content of AL ADD AL, PRICES [BX] Add content of memory at effective address PRICES [BX] to AL
SUB – SUB Destination, Source SBB – SBB Destination, Source
These instructions subtract the number in some source from the number in some destination and put the result in the destination. The SBB instruction also subtracts the content of carry flag from the destination. The source may be an immediate number, a register or memory location. The destination can also be a register or a memory location. However, the source and the destination cannot both be memory location. The source and the destination must both be of the same type (bytes or words). If you want to subtract a byte from a word, you must first move the byte to a word location such as a 16-bit register and fill the upper byte of the word with 0’s. Flags affected: AF, CF, OF, PF, SF, ZF.
SUB CX, BX CX – BX; Result in CX SBB CH, AL Subtract content of AL and content of CF from content of CH. Result in CH SUB AX, 3427H Subtract immediate number 3427H from AX SBB BX, [3427H] Subtract word at displacement 3427H in DS and content of CF
DIV – DIV Source
This instruction is used to divide an unsigned word by a byte or to divide an unsigned double word ( bits) by a word. When a word is divided by a byte, the word must be in the AX register. The divisor can be in a register or a memory location. After the division, AL will contain the 8-bit quotient, and AH will contain the 8-bit remainder. When a double word is divided by a word, the most significant word of the double word must be in DX, and the least significant word of the double word must be in AX. After the division, AX will contain the 16-bit quotient and DX will contain the 16-bit remainder. If an attempt is made to divide by 0 or if the quotient is too large to fit in the destination (greater than FFH / FFFFH), the 8086 will generate a type 0 interrupt. All flags are undefined after a DIV instruction.
If you want to divide a byte by a byte, you must first put the dividend byte in AL and fill AH with all 0’s. Likewise, if you want to divide a word by another word, then put the dividend word in AX and fill DX with all 0’s.
DIV BL Divide word in AX by byte in BL; Quotient in AL, remainder in AH DIV CX Divide down word in DX and AX by word in CX; Quotient in AX, and remainder in DX. DIV SCALE [BX] AX / (byte at effective address SCALE [BX]) if SCALE [BX] is of type byte; or (DX and AX) / (word at effective address SCALE[BX] if SCALE[BX] is of type word
IDIV – IDIV Source
This instruction is used to divide a signed word by a signed byte, or to divide a signed double word by a signed word.
When dividing a signed word by a signed byte, the word must be in the AX register. The divisor can be in an 8-bit register or a memory location. After the division, AL will contain the signed quotient, and AH will contain the signed remainder. The sign of the remainder will be the same as the sign of the dividend. If an attempt is made to divide by 0, the quotient is greater than 127 (7FH) or less than – 127 (81H), the 8086 will automatically generate a type 0 interrupt.
When dividing a signed double word by a signed word, the most significant word of the dividend (numerator) must be in the DX register, and the least significant word of the dividend must be in the AX register. The divisor can be in any other 16-bit register or memory location. After the division, AX will contain a signed 16-bit quotient, and DX will contain a signed 16-bit remainder. The sign of the remainder will be the same as the sign of the dividend. Again, if an attempt is made to divide by 0, the quotient is greater than +32,767 (7FFFH) or less than – 32,767 (8001H), the 8086 will automatically generate a type 0 interrupt.
All flags are undefined after an IDIV.
If you want to divide a signed byte by a signed byte, you must first put the dividend byte in AL and sign- extend AL into AH. The CBW instruction can be used for this purpose. Likewise, if you want to divide a signed word by a signed word, you must put the dividend word in AX and extend the sign of AX to all the bits of DX. The CWD instruction can be used for this purpose.
IDIV BL Signed word in AX/signed byte in BL IDIV BP Signed double word in DX and AX/signed word in BP IDIV BYTE PTR [BX] AX / byte at offset [BX] in DS
INC – INC Destination
The INC instruction adds 1 to a specified register or to a memory location. AF, OF, PF, SF, and ZF are updated, but CF is not affected. This means that if an 8-bit destination containing FFH or a 16-bit destination containing FFFFH is incremented, the result will be all 0’s with no carry.
INC BL Add 1 to contains of BL register INC CX Add 1 to contains of CX register INC BYTE PTR [BX] Increment byte in data segment at offset contained in BX. INC WORD PTR [BX] Increment the word at offset of [BX] and [BX + 1] in the data segment. INC TEMP Increment byte or word named TEMP in the data segment. Increment byte if MAX_TEMP declared with DB. Increment word if MAX_TEMP is declared with DW. INC PRICES [BX] Increment element pointed to by [BX] in array PRICES. Increment a word if PRICES is declared as an array of words; Increment a byte if PRICES is declared as an array of bytes.
DEC – DEC Destination
This instruction subtracts 1 from the destination word or byte. The destination can be a register or a memory location. AF, OF, SF, PF, and ZF are updated, but CF is not affected. This means that if an 8-bit destination containing 00H or a 16-bit destination containing 0000H is decremented, the result will be FFH or FFFFH with no carry (borrow).
DEC CL Subtract 1 from content of CL register DEC BP Subtract 1 from content of BP register DEC BYTE PTR [BX] Subtract 1 from byte at offset [BX] in DS. DEC WORD PTR [BP] Subtract 1 from a word at offset [BP] in SS. DEC COUNT Subtract 1 from byte or word named COUNT in DS. Decrement a byte if COUNT is declared with a DB; Decrement a word if COUNT is declared with a DW.
This instruction is used to make sure the result of adding two packed BCD numbers is adjusted to be a legal BCD number. The result of the addition must be in AL for DAA to work correctly. If the lower nibble in AL after an addition is greater than 9 or AF was set by the addition, then the DAA instruction will add 6 to the lower nibble in AL. If the result in the upper nibble of AL in now greater than 9 or if the carry flag was set by the addition or correction, then the DAA instruction will add 60H to AL.
Let AL = 59 BCD, and BL = 35 BCD ADD AL, BL AL = 8EH; lower nibble > 9, add 06H to AL DAA AL = 94 BCD, CF = 0 Let AL = 88 BCD, and BL = 49 BCD ADD AL, BL AL = D1H; AF = 1, add 06H to AL DAA AL = D7H; upper nibble > 9, add 60H to AL AL = 37 BCD, CF = 1
The DAA instruction updates AF, CF, SF, PF, and ZF; but OF is undefined.
This instruction is used after subtracting one packed BCD number from another packed BCD number, to make sure the result is correct packed BCD. The result of the subtraction must be in AL for DAS to work correctly. If the lower nibble in AL after a subtraction is greater than 9 or the AF was set by the subtraction, then the DAS instruction will subtract 6 from the lower nibble AL. If the result in the upper nibble is now greater than 9 or if the carry flag was set, the DAS instruction will subtract 60 from AL.
Let AL = 86 BCD, and BH = 57 BCD SUB AL, BH AL = 2FH; lower nibble > 9, subtract 06H from AL AL = 29 BCD, CF = 0
Before you can multiply two ASCII digits, you must first mask the upper 4 bit of each. This leaves unpacked BCD (one BCD digit per byte) in each byte. After the two unpacked BCD digits are multiplied, the AAM instruction is used to adjust the product to two unpacked BCD digits in AX. AAM works only after the multiplication of two unpacked BCD bytes, and it works only the operand in AL. AAM updates PF, SF and ZF but AF; CF and OF are left undefined.
Let AL = 00000101 (unpacked BCD 5), and BH = 00001001 (unpacked BCD 9) MUL BH AL x BH: AX = 00000000 00101101 = 002DH AAM AX = 00000100 00000101 = 0405H (unpacked BCD for 45)
AAD converts two unpacked BCD digits in AH and AL to the equivalent binary number in AL. This adjustment must be made before dividing the two unpacked BCD digits in AX by an unpacked BCD byte. After the BCD division, AL will contain the unpacked BCD quotient and AH will contain the unpacked BCD remainder. AAD updates PF, SF and ZF; AF, CF and OF are left undefined.
Let AX = 0607 (unpacked BCD for 67 decimal), and CH = 09H AAD AX = 0043 (43H = 67 decimal) DIV CH AL = 07; AH = 04; Flags undefined after DIV
If an attempt is made to divide by 0, the 8086 will generate a type 0 interrupt.
AND – AND Destination, Source
This instruction ANDs each bit in a source byte or word with the same numbered bit in a destination byte or word. The result is put in the specified destination. The content of the specified source is not changed.
The source can be an immediate number, the content of a register, or the content of a memory location. The destination can be a register or a memory location. The source and the destination cannot both be memory locations. CF and OF are both 0 after AND. PF, SF, and ZF are updated by the AND instruction. AF is undefined. PF has meaning only for an 8-bit operand.
AND CX, [SI] AND word in DS at offset [SI] with word in CX register; Result in CX register AND BH, CL AND byte in CL with byte in BH; Result in BH AND BX, 00FFH 00FFH Masks upper byte, leaves lower byte unchanged.
OR – OR Destination, Source
This instruction ORs each bit in a source byte or word with the same numbered bit in a destination byte or word. The result is put in the specified destination. The content of the specified source is not changed.
The source can be an immediate number, the content of a register, or the content of a memory location. The destination can be a register or a memory location. The source and destination cannot both be memory locations. CF and OF are both 0 after OR. PF, SF, and ZF are updated by the OR instruction. AF is undefined. PF has meaning only for an 8-bit operand.
OR AH, CL CL ORed with AH, result in AH, CL not changed
OR BP, SI SI ORed with BP, result in BP, SI not changed OR SI, BP BP ORed with SI, result in SI, BP not changed OR BL, 80H BL ORed with immediate number 80H; sets MSB of BL to 1 OR CX, TABLE [SI] CX ORed with word from effective address TABLE [SI]; Content of memory is not changed.
XOR – XOR Destination, Source
This instruction Exclusive-ORs each bit in a source byte or word with the same numbered bit in a destination byte or word. The result is put in the specified destination. The content of the specified source is not changed.
The source can be an immediate number, the content of a register, or the content of a memory location. The destination can be a register or a memory location. The source and destination cannot both be memory locations. CF and OF are both 0 after XOR. PF, SF, and ZF are updated. PF has meaning only for an 8-bit operand. AF is undefined.
XOR CL, BH Byte in BH exclusive-ORed with byte in CL. Result in CL. BH not changed. XOR BP, DI Word in DI exclusive-ORed with word in BP. Result in BP. DI not changed. XOR WORD PTR [BX], 00FFH Exclusive-OR immediate number 00FFH with word at offset [BX] in the data segment. Result in memory location [BX]
NOT – NOT Destination
The NOT instruction inverts each bit (forms the 1’s complement) of a byte or word in the specified destination. The destination can be a register or a memory location. This instruction does not affect any flag.
NOT BX Complement content or BX register NOT BYTE PTR [BX] Complement memory byte at offset [BX] in data segment.
NEG – NEG Destination
This instruction replaces the number in a destination with its 2’s complement. The destination can be a register or a memory location. It gives the same result as the invert each bit and add one algorithm. The NEG instruction updates AF, AF, PF, ZF, and OF.
NEG AL Replace number in AL with its 2’s complement NEG BX Replace number in BX with its 2’s complement NEG BYTE PTR [BX] Replace byte at offset BX in DX with its 2’s complement NEG WORD PTR [BP] Replace word at offset BP in SS with its 2’s complement
CMP – CMP Destination, Source
This instruction compares a byte / word in the specified source with a byte / word in the specified destination. The source can be an immediate number, a register, or a memory location. The destination can be a register or a memory location. However, the source and the destination cannot both be memory locations. The comparison is actually done by subtracting the source byte or word from the destination byte or word. The source and the destination are not changed, but the flags are set to indicate the results of the comparison. AF, OF, SF, ZF, PF, and CF are updated by the CMP instruction. For the instruction CMP CX, BX, the values of CF, ZF, and SF will be as follows:
RCR – RCR Destination, Count
This instruction rotates all the bits in a specified word or byte some number of bit positions to the right. The operation circular because the LSB of the operand is rotated into the carry flag and the bit in the carry flag is rotate around into MSB of the operand.
CF MSB LSB
For multi-bit rotate, CF will contain the bit most recently rotated out of the LSB.
The destination can be a register or a memory location. If you want to rotate the operand by one bit position, you can specify this by putting a 1 in the count position of the instruction. To rotate more than one bit position, load the desired number into the CL register and put “CL” in the count position of the instruction.
RCR affects only CF and OF. OF will be a 1 after a single bit RCR if the MSB was changed by the rotate. OF is undefined after the multi-bit rotate.
RCR BX, 1 Word in BX right 1 bit, CF to MSB, LSB to CF MOV CL, 4 Load CL for rotating 4 bit position RCR BYTE PTR [BX], 4 Rotate the byte at offset [BX] in DS 4 bit positions right CF = original bit 3, Bit 4 – original CF.
ROL – ROL Destination, Count
This instruction rotates all the bits in a specified word or byte to the left some number of bit positions. The data bit rotated out of MSB is circled back into the LSB. It is also copied into CF. In the case of multiple-bit rotate, CF will contain a copy of the bit most recently moved out of the MSB.
CF MSB LSB
The destination can be a register or a memory location. If you to want rotate the operand by one bit position, you can specify this by putting 1 in the count position in the instruction. To rotate more than one bit position, load the desired number into the CL register and put “CL” in the count position of the instruction.
ROL affects only CF and OF. OF will be a 1 after a single bit ROL if the MSB was changed by the rotate.
ROL AX, 1 Rotate the word in AX 1 bit position left, MSB to LSB and CF MOV CL, 04H Load number of bits to rotate in CL ROL BL, CL Rotate BL 4 bit positions ROL FACTOR [BX], 1 Rotate the word or byte in DS at EA = FACTOR [BX] by 1 bit position left into CF
ROR – ROR Destination, Count
This instruction rotates all the bits in a specified word or byte some number of bit positions to right. The operation is desired as a rotate rather than shift, because the bit moved out of the LSB is rotated around into the MSB. The data bit moved out of the LSB is also copied into CF. In the case of multiple bit rotates, CF will contain a copy of the bit most recently moved out of the LSB.
CF MSB LSB
The destination can be a register or a memory location. If you want to rotate the operand by one bit position, you can specify this by putting 1 in the count position in the instruction. To rotate by more than one bit position, load the desired number into the CL register and put “CL” in the count position of the instruction.
ROR affects only CF and OF. OF will be a 1 after a single bit ROR if the MSB was changed by the rotate.
ROR BL, 1 Rotate all bits in BL right 1 bit position LSB to MSB and to CF MOV CL, 08H Load CL with number of bit positions to be rotated ROR WORD PTR [BX], CL Rotate word in DS at offset [BX] 8 bit position right
SAL – SAL Destination, Count SHL – SHL Destination, Count
SAL and SHL are two mnemonics for the same instruction. This instruction shifts each bit in the specified destination some number of bit positions to the left. As a bit is shifted out of the LSB operation, a 0 is put in the LSB position. The MSB will be shifted into CF. In the case of multi-bit shift, CF will contain the bit most recently shifted out from the MSB. Bits shifted into CF previously will be lost.
CF MSB LSB 0
The destination operand can be a byte or a word. It can be in a register or in a memory location. If you want to shift the operand by one bit position, you can specify this by putting a 1 in the count position of the instruction. For shifts of more than 1 bit position, load the desired number of shifts into the CL register, and put “CL” in the count position of the instruction.
The flags are affected as follow: CF contains the bit most recently shifted out from MSB. For a count of one, OF will be 1 if CF and the current MSB are not the same. For multiple-bit shifts, OF is undefined. SF and ZF will be updated to reflect the condition of the destination. PF will have meaning only for an operand in AL. AF is undefined.
SAL BX, 1 Shift word in BX 1 bit position left, 0 in LSB MOV CL, 02h Load desired number of shifts in CL SAL BP, CL Shift word in BP left CL bit positions, 0 in LSBs SAL BYTE PTR [BX], 1 Shift byte in DX at offset [BX] 1 bit position left, 0 in LSB
SAR – SAR Destination, Count
This instruction shifts each bit in the specified destination some number of bit positions to the right. As a bit is shifted out of the MSB position, a copy of the old MSB is put in the MSB position. In other words, the sign bit is copied into the MSB. The LSB will be shifted into CF. In the case of multiple-bit shift, CF will contain the bit most recently shifted out from the LSB. Bits shifted into CF previously will be lost.
MSB MSB LSB CF
The destination operand can be a byte or a word. It can be in a register or in a memory location. If you want to shift the operand by one bit position, you can specify this by putting a 1 in the count position of the instruction. For shifts of more than 1 bit position, load the desired number of shifts into the CL register, and put “CL” in the count position of the instruction.
The flags are affected as follow: CF contains the bit most recently shifted in from LSB. For a count of one, OF will be 1 if the two MSBs are not the same. After a multi-bit SAR, OF will be 0. SF and ZF will be updated to show the condition of the destination. PF will have meaning only for an 8- bit destination. AF will be undefined after SAR.
SAR DX, 1 Shift word in DI one bit position right, new MSB = old MSB MOV CL, 02H Load desired number of shifts in CL
part of the instruction. This type of jump is referred to as direct because the displacement of the destination or the destination itself is specified directly in the instruction.
JMP BX This instruction replaces the content of IP with the content of BX. BX must first be loaded with the offset of the destination instruction in CS. This is a near jump. It is also referred to as an indirect jump because the new value of IP comes from a register rather than from the instruction itself, as in a direct jump.
JMP WORD PTR [BX] This instruction replaces IP with word from a memory location pointed to by BX in DX. This is an indirect near jump.
JMP DWORD PTR [SI] This instruction replaces IP with word pointed to by SI in DS. It replaces CS with a word pointed by SI + 2 in DS. This is an indirect far jump.
If, after a compare or some other instructions which affect flags, the zero flag and the carry flag both are 0, this instruction will cause execution to jump to a label given in the instruction. If CF and ZF are not both 0, the instruction will have no effect on program execution.
CMP AX, 4371H Compare by subtracting 4371H from AX JA NEXT Jump to label NEXT if AX above 4371H CMP AX, 4371H Compare (AX – 4371H) JNBE NEXT Jump to label NEXT if AX not below or equal to 4371H
If, after a compare or some other instructions which affect flags, the carry flag is 0, this instruction will cause execution to jump to a label given in the instruction. If CF is 1, the instruction will have no effect on program execution.
CMP AX, 4371H Compare (AX – 4371H) JAE NEXT Jump to label NEXT if AX above 4371H CMP AX, 4371H Compare (AX – 4371H) JNB NEXT Jump to label NEXT if AX not below 4371H ADD AL, BL Add two bytes JNC NEXT If the result with in acceptable range, continue
If, after a compare or some other instructions which affect flags, the carry flag is a 1, this instruction will cause execution to jump to a label given in the instruction. If CF is 0, the instruction will have no effect on program execution.
CMP AX, 4371H Compare (AX – 4371H) JB NEXT Jump to label NEXT if AX below 4371H ADD BX, CX Add two words JC NEXT Jump to label NEXT if CF = 1 CMP AX, 4371H Compare (AX – 4371H) JNAE NEXT Jump to label NEXT if AX not above or equal to 4371H
If, after a compare or some other instructions which affect flags, either the zero flag or the carry flag is 1, this instruction will cause execution to jump to a label given in the instruction. If CF and ZF are both 0, the instruction will have no effect on program execution.
CMP AX, 4371H Compare (AX – 4371H) JBE NEXT Jump to label NEXT if AX is below or equal to 4371H CMP AX, 4371H Compare (AX – 4371H) JNA NEXT Jump to label NEXT if AX not above 4371H
This instruction is usually used after a Compare instruction. The instruction will cause a jump to the label given in the instruction, if the zero flag is 0 and the carry flag is the same as the overflow flag.
CMP BL, 39H Compare by subtracting 39H from BL JG NEXT Jump to label NEXT if BL more positive than 39H CMP BL, 39H Compare by subtracting 39H from BL JNLE NEXT Jump to label NEXT if BL is not less than or equal to 39H
This instruction is usually used after a Compare instruction. The instruction will cause a jump to the label given in the instruction, if the sign flag is equal to the overflow flag.
CMP BL, 39H Compare by subtracting 39H from BL JGE NEXT Jump to label NEXT if BL more positive than or equal to 39H CMP BL, 39H Compare by subtracting 39H from BL JNL NEXT Jump to label NEXT if BL not less than 39H
This instruction is usually used after a Compare instruction. The instruction will cause a jump to the label given in the instruction if the sign flag is not equal to the overflow flag.
CMP BL, 39H Compare by subtracting 39H from BL JL AGAIN Jump to label AGAIN if BL more negative than 39H CMP BL, 39H Compare by subtracting 39H from BL JNGE AGAIN Jump to label AGAIN if BL not more positive than or equal to 39H
This instruction is usually used after a Compare instruction. The instruction will cause a jump to the label given in the instruction if the zero flag is set, or if the sign flag not equal to the overflow flag.
CMP BL, 39H Compare by subtracting 39H from BL JLE NEXT Jump to label NEXT if BL more negative than or equal to 39H CMP BL, 39H Compare by subtracting 39H from BL JNG NEXT Jump to label NEXT if BL not more positive than 39H
If the number of 1’s left in the lower 8 bits of a data word after an instruction which affects the parity flag is odd, then the parity flag is 0. The JNP / JPO instruction will cause a jump to the specified destination address, if the parity flag is 0.
IN AL, 0F8H Read ASCII character from Port F8H OR AL, AL Set flags JPO ERROR Even parity expected, send error message if parity found odd
The overflow flag will be set if the magnitude of the result produced by some signed arithmetic operation is too large to fit in the destination register or memory location. The JO instruction will cause a jump to the destination given in the instruction, if the overflow flag is set.
ADD AL, BL Add signed bytes in AL and BL JO ERROR Jump to label ERROR if overflow from add
The overflow flag will be set if some signed arithmetic operation is too large to fit in the destination register or memory location. The JNO instruction will cause a jump to the destination given in the instruction, if the overflow flag is not set.
ADD AL, BL Add signed byte in AL and BL JNO DONE Process DONE if no overflow
This instruction will cause a jump to the label to a given in the instruction, if the CX register contains all 0’s. The instruction does not look at the zero flag when it decides whether to jump or not.
JCXZ SKIP If CX = 0, skip the process SUB [BX], 07H Subtract 7 from data value SKIP: ADD C Next instruction
This instruction is used to repeat a series of instructions some number of times. The number of times the instruction sequence is to be repeated is loaded into CX. Each time the LOOP instruction executes, CX is automatically decremented by 1. If CX is not 0, execution will jump to a destination specified by a label in the instruction. If CX = 0 after the auto decrement, execution will simply go on to the next instruction after LOOP. The destination address for the jump must be in the range of – 128 bytes to +127 bytes from the address of the instruction after the LOOP instruction. This instruction does not affect any flag.
MOV BX, OFFSET PRICES Point BX at first element in array MOV CX, 40 Load CX with number of elements in array NEXT: MOV AL, [BX] Get element from array INC AL Increment the content of AL MOV [BX], AL Put result back in array INC BX Increment BX to point to next location LOOP NEXT Repeat until all elements adjusted
This instruction is used to repeat a group of instructions some number of times, or until the zero flag becomes 0. The number of times the instruction sequence is to be repeated is loaded into CX. Each time the LOOP instruction executes, CX is automatically decremented by 1. If CX 0 and ZF = 1, execution will jump to a destination specified by a label in the instruction. If CX = 0, execution simply go on the next instruction after LOOPE / LOOPZ. In other words, the two ways to exit the loop are CX = 0 or ZF =
MOV BX, OFFSET ARRAY Point BX to address of ARRAY before start of array DEC BX Decrement BX MOV CX, 100 Put number of array elements in CX NEXT: INC BX Point to next element in array CMP [BX], OFFH Compare array element with FFH LOOPE NEXT
This instruction is used to repeat a group of instructions some number of times, or until the zero flag becomes a 1. The number of times the instruction sequence is to be repeated is loaded into the count register CX. Each time the LOOPNE / LOOPNZ instruction executes, CX is automatically decremented by 1. If CX 0 and ZF = 0, execution will jump to a destination specified by a label in the instruction. If CX = 0, after the auto decrement or if ZF = 1, execution simply go on the next instruction after LOOPNE / LOOPNZ. In other words, the two ways to exit the loop are CX = 0 or ZF = 1. The destination address for the jump must be in the range of – 128 bytes to +127 bytes from the address of the instruction after the LOOPNE / LOOPZ instruction. This instruction does not affect any flags.
MOV BX, OFFSET ARRAY Point BX to adjust before start of array DEC BX Decrement BX MOV CX, 100 Put number of array in CX NEXT: INC BX Point to next element in array CMP [BX], ODH Compare array element with 0DH LOOPNZ NEXT
The CALL instruction is used to transfer execution to a subprogram or a procedure. There two basic type of calls near and far.
number of elements to be moved is put in the CX register so that it can function as a counter. After the byte or a word is moved, SI and DI are automatically adjusted to point to the next source element and the next destination element. If DF is 0, then SI and DI will incremented by 1 after a byte move and by 2 after a word move. If DF is 1, then SI and DI will be decremented by 1 after a byte move and by 2 after a word move. MOVS does not affect any flag.
When using the MOVS instruction, you must in some way tell the assembler whether you want to move a string as bytes or as word. There are two ways to do this. The first way is to indicate the name of the source and destination strings in the instruction, as, for example. MOVS DEST, SRC. The assembler will code the instruction for a byte / word move if they were declared with a DB / DW. The second way is to add a “B” or a “W” to the MOVS mnemonic. MOVSB says move a string as bytes; MOVSW says move a string as words.
MOV SI, OFFSET SOURCE Load offset of start of source string in DS into SI MOV DI, OFFSET DESTINATION Load offset of start of destination string in ES into DI CLD Clear DF to auto increment SI and DI after move MOV CX, 04H Load length of string into CX as counter REP MOVSB Move string byte until CX = 0
This instruction copies a byte from a string location pointed to by SI to AL, or a word from a string location pointed to by SI to AX. If DF is 0, SI will be automatically incremented (by 1 for a byte string, and 2 for a word string) to point to the next element of the string. If DF is 1, SI will be automatically decremented (by 1 for a byte string, and 2 for a word string) to point to the previous element of the string. LODS does not affect any flag.
CLD Clear direction flag so that SI is auto-incremented MOV SI, OFFSET SOURCE Point SI to start of string LODS SOURCE Copy a byte or a word from string to AL or AX
Note: The assembler uses the name of the string to determine whether the string is of type bye or type word. Instead of using the string name to do this, you can use the mnemonic LODSB to tell the assembler that the string is type byte or the mnemonic LODSW to tell the assembler that the string is of type word.
This instruction copies a byte from AL or a word from AX to a memory location in the extra segment pointed to by DI. In effect, it replaces a string element with a byte from AL or a word from AX. After the copy, DI is automatically incremented or decremented to point to next or previous element of the string. If DF is cleared, then DI will automatically incremented by 1 for a byte string and by 2 for a word string. If DI is set, DI will be automatically decremented by 1 for a byte string and by 2 for a word string. STOS does not affect any flag.
MOV DI, OFFSET TARGET STOS TARGET
Note: The assembler uses the string name to determine whether the string is of type byte or type word. If it is a byte string, then string byte is replaced with content of AL. If it is a word string, then string word is replaced with content of AX.
MOV DI, OFFSET TARGET STOSB
“B” added to STOSB mnemonic tells assembler to replace byte in string with byte from AL. STOSW would tell assembler directly to replace a word in the string with a word from AX.
This instruction can be used to compare a byte / word in one string with a byte / word in another string. SI is used to hold the offset of the byte or word in the source string, and DI is used to hold the offset of the byte or word in the destination string.
The AF, CF, OF, PF, SF, and ZF flags are affected by the comparison, but the two operands are not affected. After the comparison, SI and DI will automatically be incremented or decremented to point to the next or previous element in the two strings. If DF is set, then SI and DI will automatically be decremented by 1 for a byte string and by 2 for a word string. If DF is reset, then SI and DI will automatically be incremented by 1 for byte strings and by 2 for word strings. The string pointed to by SI must be in the data segment. The string pointed to by DI must be in the extra segment.
The CMPS instruction can be used with a REPE or REPNE prefix to compare all the elements of a string.
MOV SI, OFFSET FIRST Point SI to source string MOV DI, OFFSET SECOND Point DI to destination string CLD DF cleared, SI and DI will auto-increment after compare MOV CX, 100 Put number of string elements in CX REPE CMPSB Repeat the comparison of string bytes until end of string or until compared bytes are not equal
CX functions as a counter, which the REPE prefix will cause CX to be decremented after each compare. The B attached to CMPS tells the assembler that the strings are of type byte. If you want to tell the assembler that strings are of type word, write the instruction as CMPSW. The REPE CMPSW instruction will cause the pointers in SI and DI to be incremented by 2 after each compare, if the direction flag is set.
SCAS compares a byte in AL or a word in AX with a byte or a word in ES pointed to by DI. Therefore, the string to be scanned must be in the extra segment, and DI must contain the offset of the byte or the word to be compared. If DF is cleared, then DI will be incremented by 1 for byte strings and by 2 for word strings. If DF is set, then DI will be decremented by 1 for byte strings and by 2 for word strings. SCAS affects AF, CF, OF, PF, SF, and ZF, but it does not change either the operand in AL (AX) or the operand in the string.
The following program segment scans a text string of 80 characters for a carriage return, 0DH, and puts the offset of string into DI:
MOV DI, OFFSET STRING MOV AL, 0DH Byte to be scanned for into AL MOV CX, 80 CX used as element counter CLD Clear DF, so that DI auto increments REPNE SCAS STRING Compare byte in string with byte in AL
REP is a prefix, which is written before one of the string instructions. It will cause the CX register to be decremented and the string instruction to be repeated until CX = 0. The instruction REP MOVSB, for example, will continue to copy string bytes until the number of bytes loaded into CX has been copied.
REPE and REPZ are two mnemonics for the same prefix. They stand for repeat if equal and repeat if zero , respectively. They are often used with the Compare String instruction or with the Scan String instruction. They will cause the string instruction to be repeated as long as the compared bytes or words are equal (ZF = 1) and CX is not yet counted down to zero. In other words, there are two conditions that will stop the repetition: CX = 0 or string bytes or words not equal.