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Micro Computer and
MICROPROCESSOR
Microprocessor Terminology
- (^) Integrated circuits
- (^) An electronic circuit fabricated out of a solid block of semiconductor material using LSI, VLSI or ULSI.
- (^) Microprocessor (μp)
- (^) An electronic integrated circuit fabricated on a single chip that monitors, controls and executes the machine language instructions.
- (^) Microprocessor-based system
- (^) This is any system that contains a microprocessor, and does not necessarily have anything to do with computing.
- (^) Microcomputer
- (^) The particular microprocessor-based systems that happen to be used as a computer are called microcomputers
- (^) Microcontroller
- (^) This is a complete microprocessor-based control system built onto a single chip.
Harvard architecture
Block Diagram of a Simple Microcomputer
system
Overview of Microcomputer Cont.
- (^) Central Processing Unit (CPU)
- (^) CPU controls the operations of Computer. In Microcomputers CPU is one or more microprocessors (μP).
- (^) CPU communicates with Memory and I/O devices using parallel signal lines called Buses - (^) There are three distinct buses 1. Address Bus: Unidirectional 2. Data Bus : Bidirectional 3. Control Bus: Bidirectional
MICROPROCESSOR 8086
- (^) The 8086 was the first 16-bit microprocessor introduced by Intel in 1978.
- (^) It is implemented in HMOS ( High density short channel MOS) technology.
- (^) It is packaged in a 40-pin CERDIP or plastic package.
- (^) It is available in three clock rates: 8086 in 5Mhz, 8086-2 in 8Mhz, and 8086-1 in 10Mhz.
- (^8086) operates in both single processor and multiple processor configuration to achieve high performance levels.
- (^) It has 20-address bus and hence can access as much as 1MB(2^20 ) memory locations.
- (^) It has 16-bit data bus.
FUNCTIONAL BLOCK DIAGRAM OF 8086 8086 Microprocessor is divided into two independent functional parts.
- (^) Bus interface unit (BIU).
- (^) Execution unit (EU).
BUS INTERFACE UNIT
- (^) The bus interface unit handles all transfer of data and addresses on the buses for the Execution unit.
- (^) This unit sends out addresses, fetches instructions from memory, reads data from ports and memory and writes data to ports and memory.
SEGMENT REGISTERS
BIU contains four 16-bit segment registers as follows:
- (^) Code segment (CS) register.
- (^) Stack segment (SS) register.
- (^) Extra segment (ES) register.
- (^) Data segment (DS) register.
FUNCTION OF SEGMENT REGISTERS
- (^) In 8086 complete 1MB memory is divided into 16 logical segments.
- (^) Each segment thus contains 64 KB of memory.
- (^) While addressing any location in the memory bank, the Physical address is calculated from two parts, the first part is Segment address, and the second is Offset.
- (^) The segment registers contain 16-bit segment base addresses related to different segments.
- (^) Thus the CS, DS, ES, SS segment registers, respectively contain the segment addresses for the Code, Data, Extra and Stack segments.
- (^) They may or may not be physical separated.
- (^) Each segment register contains a 16-bit base address that points to the lowest-addressed byte of that particular segment in memory.
GENERATION OF PHYSICAL ADDRESS Segment address- 1005H Offset address - 5555H Segment address-1005H- 0001 0000 0000 0101 Shifted by 4-bit positions-0001 0000 0000 0101 0000
Offset address - 0101 0101 0101 0101 Physical address -0001 0101 0101 1010 0101 1 5 5 A 5
INSTRUCTION POINTER
- (^) It is 16-bit register , which identifies the location of the next word of instruction code that is to be fetched in the current code segment.
- (^) IP contains an offset instead of the actual address of the next instruction.
- (^) The 20-bit address produced after addition of the offset stored in IP to segment base address in the CS is called the Physical address of the code byte.
EXECUTION UNIT
- (^) It tells the BIU where to fetch instructions or data from.
- (^) Decodes the instruction.
- (^) Executes instructions.
DIFERENT PARTS OF EU
• ALU
- (^) Decoder
- (^) Control Circuitry
- (^) General purpose registers
- (^) Flag register
- (^) Pointer and Index registers