Architectural Analysis of a DSP Device,
the Instruction Set and the Addressing Modes
1
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Architectural Analysis: FIR Filter Implementation on ADSP-21x and DSP Requirements, Slides of Electrical Engineering
An outline and detailed steps for implementing a finite impulse response (fir) filter using a circular buffer on the adsp-21x dsp device. It covers the requirements of the dsp, including fast multiply-accumulates, extended precision accumulator register, dual operand fetch, circular buffering, and zero-overhead looping. The document also discusses various analog devices architectures and programming, such as sharc and blackfin, and their optimization techniques.
Typology: Slides
2012/2013
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Architectural Analysis of a DSP Device,
the Instruction Set and the Addressing Modes
Docsity.com^1
Outline
- FIR filter on ADPS-21x
DSP Requirements
- Fast Multiply-Accumulates (Data-path)
- Extended Precision Accumulator Register (Data-path)
- Dual Operand Fetch (Memory)
- Circular Buffering (Addressing)
- Zero-Overhead Looping (Instruction set)
Analog Devices Architectures and Programming
- SHARC
- Blackfin
- Performance Optimization
Docsity.com^2
CALCULATING OUTPUTS OF 4-TAP FIR FILTER USING A CIRCULAR BUFFER
4
y(3) = h(0) x(3) + h(1) x(2) + h(2) x(1) + h(3) x(0)
y(4) = h(0) x(4) + h(1) x(3) + h(2) x(2) + h(3) x(1)
y(5) = h(0) x(5) + h(1) x(4) + h(2) x(3) + h(3) x(2)
Memory Location 0 1 2 3
Read x(0) x(1) x(2) x(3)
Write x(4)
Read x(4) x(1) x(2) x(3)
Write
x(5)
Read x(4) x(5) x(2) x(3)
Copied from [Kester03] Docsity.com
FIR filter steps
- Obtain a sample with the ADC; generate an interrupt
- Detect and manage the interrupt
- Move the sample into the input signal's circular buffer
- Update the pointer for the input signal's circular buffer
- Zero the accumulator
- Control the loop through each of the coefficients
- Fetch the coefficient from the coefficient's circular buffer
- Update the pointer for the coefficient's circular buffer
- Fetch the sample from the input signal's circular
Copied from [Kester03]buffer^ Docsity.com^5
Outline
- FIR filter on ADPS-21x
DSP Requirements
- Fast Multiply-Accumulates (Data-path)
- Extended Precision Accumulator Register (Data-path)
- Dual Operand Fetch (Memory)
- Circular Buffering (Addressing)
- Zero-Overhead Looping (Instruction set)
Analog Devices Architectures and Programming
- SHARC
- Blackfin
- Performance Optimization
Docsity.com^7
Motorola DSP5600X
Copied from [Takala05] Docsity.com^10
ADSP -
21x MAC
www.analog.com/dsp Docsity.com^13
Outline
- FIR filter on ADPS-21x
DSP Requirements
- Fast Multiply-Accumulates (Data-path)
- Extended Precision Accumulator Register (Data-path)
- Dual Operand Fetch (Memory)
- Circular Buffering (Addressing)
- Zero-Overhead Looping (Instruction set)
Docsity.com^16
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
- Copied from [Takala05] Docsity.com
Outline
- FIR filter on ADPS-21x
DSP Requirements
- Fast Multiply-Accumulates (Data-path)
- Extended Precision Accumulator Register (Data-path)
- Dual Operand Fetch (Memory)
- Circular Buffering (Addressing)
- Zero-Overhead Looping (Instruction set)
Docsity.com^20