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Combined LNS Adder/Subtractors

for DCT Hardware

1

Outline

• Logarithmic Number System (LNS)

• Discrete Cosine Transform (DCT)

• Combined LNS adder/subtractor

2

Properties of LNS

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 Large dynamic range

 Easy for multiplications,

divisions and

exponentiations

 Additions are not linear

operations for LNS

 Cost of adders is exponential to

word lengths

 Have advantages at low

precisions

LNS Arithmetic Units

• Multiplication
  • log (^) b (XY) = log (^) b X + log (^) b Y
  • The cost is a fixed-point adder
• Addition
  • More complex process than multiplication
  • E.g., when calculating log (^) b (X+Y),

(x=log b X, y=log b Y)

1. Calculate z=x-y Z=X/Y
2. Table-lookup sb(z)=logb(1+bz) 1+X/Y
3. logb(X+Y)=y+sb(z) Y(1+X/Y)=X+Y

• Subtraction
• d (^) b (z)=log (^) b |1-bz^ |

5

Discrete Cosine Transform

= =

=

7 0

7 0

( , ) 2

( ) 2

( , ) ( ) x x

F μν c μ c^ ν f x y

x , y = 0 ... 7 ,μ,ν = 0 ... 7



 

 + 

 

 + 16

cos (^21 ) 16

cos (^2 x^1 )μπ^ y^ νπ

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 An important part in MPEG encoding

 2 Dimensional 8x8 DCT

 2-D DCT usually performed through 2 rounds

of 1-D DCT to reduce the hardware cost

LNS DCT in MPEG encoding

• Floating-point cost is too high for portable systems
• LNS has the same visual result as fixed-point at the same

precisions

• LNS have shorter word length than fixed-point numbers

At the same dynamic range and precisions for MPEG-

• Fixed-point (12+F) bits
• LNS (6+F) bits

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Diagram of Chen’s 1-D DCT

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S(1/4)

C(1/4)

S(1/8) C(1/8)

S(1/8)

-C(1/8)

C(1/4)

S(1/4)

S(1/16) C(1/16)

-S(7/16) C(7/16)

S(5/16) C(5/16) -S(3/16) C(3/16)

f(0)

f(1)

f(2)

f(3)

f(4)

f(5)

f(6)

f(7)

F(0)

F(4)

F(2)

F(6)

F(1)

F(5)

F(3)

F(7)

S(m/n)=sin(mπ/n), C(m/n)=cos(mπ/n)

Combined LNS adders/subtractors

• Many computational units as below in DCT

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X+Y

X-Y

 The above two computation always access

different s b(z) table and d b(z) table

 Share table-lookup part and some combinational

parts in the above two computations

Combined LNS adder/subtractors

(type 1)

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sb (z)

d (^) b (z)

z=x-y

_ =y+sb (z)

x

y

log (^) b (X+Y)

(=y+d (^) b (z) when S (^) x≠Sy)

=y+d (^) b (z)

log (^) b |X-Y|

(=y+s (^) b (z) when Sx≠Sy)

Combined LNS adder/subtractors

(type 1)

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sb (z)

d (^) b (z)

z=x-y

_ =y+sb (z)

x

y

log (^) b (X+Y)

(=y+d (^) b (z) when S (^) x≠Sy)

=y+d (^) b (z)

log (^) b |X-Y|

(=y+s (^) b (z) when Sx≠Sy)

Combined LNS adder/subtractors

• Some computation units perform blow

computations

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a 1 X+a 2 Y

-a 2 X+a 1 Y (a 1 , a 2 are constants)

S(1/8) C(1/8)

S(1/8)

-C(1/8)

 Access different tables in an LNS adder

 Share table-lookup part

 Add some extra combinational hardware

 The table-lookup of the two computations use

different addresses

Combined LNS adder/subtractors

(type 2)

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sb (z)

d (^) b (z)

_ =y+sb (z 1 )

log (^) b a 2 X

log (^) b (a 1 X+a 2 Y)

(=y+d (^) b (z 1 ) when Sx≠Sy)

=y+d (^) b (z 2 )

log (^) b (-a 2 X+a 1 Y)

(=y+sb (z 2 ) when S (^) x≠Sy)

_

log (^) b a 2 Y

logb a 1 X

logb a 1 Y

z (^2)

z (^1)

ROM size with/without combined

LNS adder/subtractors

0

20000

40000

60000

80000

100000

120000

140000

160000

180000

200000

One-cycle Two-cycle

ROM bits Without With

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Hardware comparison for LNS adder and LNS

adder/subtractors

0

500

1000

1500

2000

2500

3000

3500

4000

2 3 4 5 F

Area

Ordinary Type 1 Type

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