Maximizing Compiler Performance: Code Elimination, Loop Optimization, Variable Reduction, , Assignments of Electrical and Electronics Engineering

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EECS 583 – Class 10 Classical and ILP Optimizations

University of Michigan October 8, 2007

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Reading Material

Today’s class

"Compiler Code Transformations for Superscalar-Based High-Performance Systems", S. Mahlke et al., Supercomputing '92,Nov. 1992, pp. 808-817.

Next class

“Machine Description Driven Compilers for EPIC Processors”,B. Rau, V. Kathail, and S. Aditya, HP Technical Report, HPL-98-40, 1998.

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Now Back to Optimization … Last Last Week: Dead Code Elimination

™

Remove any operation who’sresult is never consumed

™

Rules

X can be deleted

y

no stores or branches

DU chain empty or destregister not live

™

This misses some dead code!!

Especially in loops

Critical operation

y

store or branch operation

Any operation that does notdirectly or indirectly feed acritical operation is dead

Trace UD chains backwardsfrom critical operations

Any op not visited is dead

r1 = 3

r2 = 10

r4 = r4 + 1 r7 = r1 * r

r2 = 0

r3 = r3 + 1

r3 = r2 + r store (r1, r3)

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Last Last Week: Global Constant Propagation

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Consider 2 ops, X and Y indifferent BBs

1. X is a move

2. src1(X) is a literal

3. Y consumes dest(X)

4. X is in a_in(BB(Y))

5. Dest(x) is not modified betweenthe top of BB(Y) and Y

6. No danger betw X and Y

y

When dest(X) is a Macro reg,BRL destroys the value

r1 = 5 r2 = ‘_x’

r1 = r1 + r

r7 = r1 – r

r8 = r1 * r

r9 = r1 + r

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CSE – Common Subexpression Elimination

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Eliminate recomputation of anexpression by reusing the previousresult

»

r1 = r2 * r

»

Æ

r100 = r

»

…

»

r4 = r2 * r

Æ

r4 = r

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Benefits

»

Reduce work

»

Moves can get copy propagated

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Rules (ops X and Y)

»

X and Y have the same opcode

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src(X) = src(Y), for all srcs

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expr(X) is available at Y

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if X is a load, then there is no storethat may write to address(X) alongany path between X and Y

r1 = r2 * r

r3 = r4 / r

r2 = r2 + 1

r6 = r3 * 7

r5 = r2 * r

r8 = r4 / r r9 = r3 * 7

if op is a load, call it redundant load elimination rather than CSE

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Class Problem

Optimize this applying 1. dead code elimination 2. forward copy propagation 3. CSE

r4 = r1 if Truer6 = r15 if Truer2 = r3 * r4 if Truer8 = r2 + r5 if Truer9 = r3 if Truep1,p2 = cmpp(r2, r8) if Truer7 = load(r2) if Truer5 = r9 * r4 if p1r3 = load(r2) if p2r10 = r3 / r6 if p2r11 = r2 if Truer12 = load(r11) if p1store (r8, r7) if p2store(r12, r3) if True

Be careful of the predicates!

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Loop Invariant Code Motion (LICM)

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Move operations whose sourceoperands do not change withinthe loop to the loop preheader

Execute them only 1x perinvocation of the loop

Be careful with memoryoperations!

Be careful with ops notexecuted every iteration

r1 = 3r5 = 0

r4 = load(r5)

r7 = r4 * 3

r8 = r2 + 1 r7 = r8 * r

r3 = r2 + 1

r1 = r1 + r store (r1, r3)

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LICM (2)

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Rules

»

X can be moved

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src(X) not modified in loop body

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X is the only op to modify dest(X)

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for all uses of dest(X), X is in theavailable defs set

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for all exit BB, if dest(X) is live on theexit edge, X is in the available defs set onthe edge

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if X not executed on every iteration, thenX must provably not cause exceptions

»

if X is a load or store, then there are nowrites to address(X) in loop

r1 = 3r5 = 0

r4 = load(r5)

r7 = r4 * 3

r8 = r2 + 1 r7 = r8 * r

r3 = r2 + 1

r1 = r1 + r store (r1, r3)

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Induction Variable Strength Reduction ™

Create basic inductionvariables from derivedinduction variables

Induction variable

BIV (i++)

y

DIV (j = i * 4)

y

DIV can be converted into aBIV that is incremented by 4

Issues

Initial and increment vals

Where to place increments

r5 = r4 - 3

r4 = r4 + 1

r7 = r4 * r

r6 = r4 << 2

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Induction Variable Strength Reduction (2)

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Rules

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X is a *, <<, + or – operation

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src1(X) is a basic ind var

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src2(X) is invariant

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No other ops modify dest(X)

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dest(X) != src(X) for all srcs

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dest(X) is a register

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Transformation

»

Insert the following into the preheader

y

new_reg = RHS(X)

»

If opcode(X) is not add/sub, insert to thebottom of the preheader

y

new_inc = inc(src1(X)) opcode(X) src2(X)

»

else

y

new_inc = inc(src1(X))

»

Insert the following at each update ofsrc1(X)

y

new_reg += new_inc

»

Change X

Æ

dest(X) = new_reg

r5 = r4 - 3 r4 = r4 + 1

r7 = r4 * r

r6 = r4 << 2

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ILP Optimization

Traditional optimizations

Redundancy elimination

Reducing operation count

ILP (instruction-level parallelism) optimizations

Increase the amount of parallelism and the ability to overlapoperations

Operation count is secondary, often trade parallelism for extrainstructions (avoid code explosion)

ILP increased by breaking dependences

True or flow = read after write dependence

False or (anti/output) = write after read, write after write

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Register Renaming

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Remove dependences causedby variable re-use

Re-use of source variables

Re-use of temporaries

Anti, output dependences

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Create a new variable to holdeach unique life time

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Very simple transformationwith straight-line code

Make each def a uniqueregister

Substitute new name intosubsequent uses

a: r1 = r2 + r3b: r3 = r4 + r5c: r1 = r7 * r8d: r7 = r1 + r5e: r1 = r3 + 4f: r4 = r7 + 4

a: r1 = r2 + r3b: r

= r4 + r

c: r

= r7 * r

d: r

= r

+ r

e: r

= r

f: r

= r

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Rename with Copy

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Renaming within a web

The worst case is a web spansall defs/uses

Want to enable some of thedefs within the web to bereordered or executed inparallel

™

Xform

Rename def

Rename uses for which def isthe the only reaching def

Insert copy

y

orig_dest = new_dest

y =

= y

y = = y

= y

y =

= y

= y

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Predicate Promotion

™

Predicate promotion or predicatespeculation

Remove dependence betweenCMPP and predicated operation

Modify predicate of an operationto an ancestor predicate

Operation executes more oftenthan it should, “speculated”

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x = … if p

Æ

if p

Where p2 is an ancestor of p

Legal if x not live on p2 – p

And, op will not cause aspurious exception

r1 = r2 + r3 r7 = 0 p1,p2 = CMPP.UN.UC(r1 < r5) r4 = r5 * r6 if p1 r7 = r8 + r9 if p2 r10 = r4 + 4 if p1 r11 = r7 + 1 if T