Arithmetic Fundamentals and Integer ALU Design for MIPS, Slides of Computer Science

An overview of arithmetic fundamentals, including unsigned and signed numbers, two's complement notation, and logical operations. It also covers the design of an integer alu for mips, including the alu block diagram, basic integer addition, and handling subtraction, bne, beq, and set less than (slt) instructions.

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2012/2013

Uploaded on 03/22/2013

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Some arithmetic fundamentals
Unsigned numbers: values are always positive
Example: 1000 10102 = 27+23+21=14610
Signed numbers: twos complement notation
Example: 1000 10102 = -27+23+21=-11810
Leftmost bit called the sign bit
Positive numbers have a sign bit of 0, negative numbers a sign bit of 1
Sign extending a number: replicate the most significant bit the number
of times needed
Example: 1000 10102 is the same as 1111 1111 1000 10102
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Some arithmetic fundamentals

  • Unsigned numbers: values are always positive
    • Example: 1000 1010 2 = 2^7 +2^3 +2 1 =146 (^10)
  • Signed numbers: two’s complement notation
    • Example: 1000 1010 2 = -2^7 +2^3 +2^1 =-118 (^10)
    • Leftmost bit called the sign bit
      • Positive numbers have a sign bit of 0, negative numbers a sign bit of 1
  • Sign extending a number: replicate the most significant bit the number of times needed - Example: 1000 1010 2 is the same as 1111 1111 1000 1010 2

Some arithmetic fundamentals

  • Negating a two’s complement number: invert (NOT) all bits

and add 1

  • Example: negative of 1000 1010 = 0111 0101 + 1 = 0111 0110 = 118
  • Logical operations
  • AND, OR, NOR, XOR perform logic function on a bit-by-bit basis
  • Example: 1000 1010 AND 1101 0110 = 1000 0010
  • Also arithmetic/logical shift left/right

MIPS ALU requirements

• add, addu, sub, subu, addi, addiu

– => 2’s complement adder/sub with overflow

detection

• and, or, andi, oru, xor, xori, nor

– => Logical AND, logical OR, XOR, nor

• SLTI, SLTIU (set less than)

– => 2’s complement adder with inverter, check sign

bit of result

• ALU from from CS 150 / P&H book chapter 4

supports these ops

MIPS arithmetic instruction format

• Signed arithmetic generate overflow, no carry

R-type:

I-Type:

31 25 20 15 5 0 op Rs Rt Rd funct

op Rs Rt Immed 16

Type op funct ADDI 10 xx ADDIU 11 xx SLTI 12 xx SLTIU 13 xx ANDI 14 xx ORI 15 xx XORI 16 xx LUI 17 xx

Type op funct ADD 00 40 ADDU 00 41 SUB 00 42 SUBU 00 43 AND 00 44 OR 00 45 XOR 00 46 NOR 00 47

Type op funct 00 50 00 51 SLT 00 52 SLTU 00 53

ALU block diagram

  • Inputs
    • a,b: the data (operands) to be operated on
    • ALU operation: the operation to be performed
  • Outputs
    • Result: the result of the operation
    • Zero: indicates if the Result = 0 (for beq, bne)
    • CarryOut: the carry out of an addition operation
    • Overflow: indicates if an add or sub had an overflow (later)

Basic integer addition

  • Pencil-and-paper binary addition
  • Full adder sum and carry equations for each bit

(CarryOut) Sum

Sum = abCarryIn + abCarryIn + abCarryIn + abCarryIn = abCarryI

(CarryIn)

CarryOut = ab + aCarryIn + bCarryIn

a b

Creating a 32-bit ALU from 1-bit bit-slices

  • Performs ripple carry addition
    • Carry follows serial path from bit 0 to bit 31 (slow)

(LSB)

(MSB)

What should we set this to when Operation=10 (add)?

Handling subtraction

  • Perform a+(-b)
  • Recall that to negate b we
    • Invert (NOT) all bits
    • Add a 1
      • Set CarryIn input of LSB bitslice to 1
  • New bit-slice design

Implementing Set Less Than (slt)

  • Result=1 if a<b, otherwise Result=
  • All bits except bit 0 are set to zero through a new bit-slice input

called Less that goes to a 4 th^ input on the bit-slice MUX

Less^3

Set to zero for all but LSB

What do we input here?

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Implementing Set Less Than (slt)

  • Set bit 0 to one if the result of a-b is negative and to zero

otherwise

  • a-b=negative number implies that a<b
  • Feed the adder output of bit 31 to the Less input of bit 0

Less^3 Set

Only used for MSB Docsity.com

Full 32-bit ALU design

  • Bnegate controls CarryIn input to bit 0 and Binvert input to all

bit-slices

  • Both are 1 for subtract and 0 otherwise, so a single signal can be used
  • NOR, XOR, shift operations would also be included in a MIPS

implementation

Overflow

  • Overflow occurs when the result from an operation cannot be

represented with the number of available bits (32 in our ALU)

  • For signed addition, overflow occurs when
    • Adding two positive numbers gives a negative result
      • Example: 01110000…+00010000…=1000000…
    • Adding two negative numbers gives a positive result
      • Example: 10000000…+10000000…=0000000…
  • For signed subtraction, overflow occurs when
    • Subtracting a negative from a positive number gives a negative result
    • Subtracting a positive from a negative number gives a positive result

Faster carry generation

  • Ripple carry addition is too slow for wide adders
  • Some alternative faster parallel schemes
    • Carry lookahead
    • Carry skip
    • Carry select
  • Cost is more hardware!

Carry lookahead addition

  • Two ways in which carry=1 from the ith bit-slice
    • Generated if both ai and bi are 1

    • A CarryIn (ci) of 1 is propagated if ai or bi are 1

gi = ai • bi
pi = ai + bi

Are these carries generated or propagated?