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Cork Institute of Technology
Bachelor of Engineering in Electronic Engineering – Award
(National Diploma in Engineering in Electronic Engineering – Award)
(NFQ Level 7)
Summer 2005
Computer Engineering
(Time: 3 Hours)
Answer two questions from each section. All questions carry equal marks.
Examiners: Mr. J. O’Driscoll Mr. F. O’Reilly Mr. J. Berry Dr. R. Ó Dubhghaill
Section A
- (a) Describe the difference between an assembler and a cross-assembler. [6 marks]
(b) With the aid of a block diagram, (^) describe the various steps involved in the software development process. [7 marks] (c) Use the data in Figure 1 to demonstrate the operation of the following MC68000 instructions: [12 marks] (i) MOVE.L D1,D3 (ii) ADD.W (A0),D (iii) EXG D1,D3 (iv) MOVE.L –(A1),(A0)+
Figure 1
- (a) Traps and interrupts are the two types of exception handled by the MC68000 microprocessor. Briefly explain the differences between each. [4 marks] (b) Autovector and user vector are two ways the MC68000 handles interrupts. Briefly describe the functional differences between each type. [4 marks] (c) The MC68000 handles the reset exception in a different way to that of all other exceptions. List the main differences between the two types. [7 marks] (d) Figure 2 shows a diagram of the MC68000 interrupt structure. Describe how the microprocessor responds to the occurrence of an interrupt. [6 marks] List the sequence of steps that are executed by the microprocessor in servicing the interrupt. [4 marks]
Figure 2
- (a) The MC68000 controls data transfers using the asynchronous bus and the synchronous bus. State the advantages and disadvantages of each bus. [4 marks] List the signals associated with each bus and indicate whether each signal is an input, an output, or bidirectional. [4 marks] (b) The MC68000 arbitration bus is used for direct memory access (DMA) data transfers. The bus consists of three signals: BR (bus request input); BG (bus grant output); and BGACK (bus grant acknowledge input). Describe how these three signals are used in a DMA data transfer operation. [8 marks]
Over/…
Section B
- (a) The PIC 16c74 arranges its memory into two register banks. What advantages/disadvantages does this have? How do you control which register bank is addressed/selected at any time? [6 marks] (b) Explain what happens when an interrupt occurs in the PIC and how it should be handled. Explain what memory addresses are used, the different types of interrupts available and how they can be differentiated. [7 marks] (c) Describe , using flow-charts and code samples, the configuration and program stages necessary to get a PIC 16c74 microcontroller, to continually read in an analogue voltage from 0 -> 5V on RA0 and output it in binary format on PORTB. Calculate/Show the configuration values for each of the key control registers used. [12 marks]
- (a) Describe the operation of Timer 2 on the PIC. What are its key registers and what main features does it have? Calculate the configuration value for a 10kHz square wave, assuming a clock speed of 10MHz. [8 marks] (b) Describe , using diagrams, the principle of how a 16 key-keypad can be read from a micro-controller/micro-processor. How many input/outputs are needed and provide an example of how a particular key press (no 5) would be determined and identified? [9 marks] (c) For Asynchronous Serial communications a UART is often used. Using diagrams (^) describe either the transmitter or receiver part of a typical UART. Explain which sections of the transmitter/receiver are responsible for the different sections of a Serial Data Unit(SDU). On a 19,200 bps data link, how many bytes of actual data could be transmitted each second if we used 7 data bits, 2 stop bits and even parity? [8 marks]
- (a) For the PCI bus, describe its data width, clock speed and overall data transfer rate. Describe a typical data transfer and show using a timing diagram how this is co-ordinated with the clock. [6 marks] (b) Describe the following two layers of a Fibre channel system, describing their role, and some examples of their options: FC-0, FC-1. You are asked to connect together the following two fibre channel systems, name and justify the most appropriate fibre channel topology for each: (i) Four nodes which connect in changing pairs. [5 marks] (ii) Ten nodes of different priorities which all talk to each other. [5 marks] (c) In the context of RAID systems, describe briefly the following, say what RAID level they correspond to and give any advantages/disadvantages: (i) Disc Striping, [3 marks] (ii) Disc Mirroring, [3 marks] (iii) Independent Discs with Distributed Parity. [3 marks]
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Outline Solutions and Marking Scheme
[NOT FOR STUDENTS]
- (a) Descriptions [3 marks each]
(b) Diagram [3 marks] Description [4 marks]
(c) Demonstrate operation of instruction [3 marks each]
- (a) Explanation [4 marks]
(b) Description of functional differences [4 marks]
(c) List differences [7 marks]
(d) Describe response [6 marks] List sequence of steps [4 marks]
- (a) State advantages and disadvantages [4 marks] List signals [4 marks]
(b) Description of operation [8 marks]
(c) (i) Describe operation of decoders [2 marks] (ii) Describe addressing operation [2 marks] (iii) Explain purpose [2 marks]. Describe operation [3 marks]
