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Brief summary of the chapter: chapter#07
Typology: Summaries
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SHL Shift left SHR Shift right SAL Shift arithmetic left SAR Shift arithmetic right ROL Rotate left ROR Rotate left RCL Rotate carry left RCR Rotate carry right SHLD Double-precision shift left SHRD Double-precision shift right
Logical shift fills the newly created bit position with zero. Arithmetic shift fills the newly created bit position with a copy of the original number’s sign bit.
The SHL (shift left) instruction performs a logical left shift on the destination operand, filling the lowest bit with 0. The highest bit is moved to the Carry flag, and the bit that was in the Carry flag is discarded. SHL can perform multiplication by powers of 2. Shifting any operand left by n bits multiplies the operand by 2n. Syntax:
The first operand in SHL is the destination and the second is the shift count:
SHL destination, count
Types of Operands: SHL reg, imm SHL mem, imm SHL reg, CL SHL mem, CL
(CL register can contain a shift count)
The SAR (shift arithmetic right) instruction performs a right arithmetic shift on its destination operand.
The operands for SAL and SAR are identical to those for SHL and SHR. The shift may be repeated, based on the counter in the second operand.
Division of signed numbers by shifting is accomplished using the SAR instruction because it preserves the number’s sign bit.
The ROL instruction shifts each bit to the left. The highest bit is copied into the Carry flag and the lowest bit position. The instruction format is the same as for SHL.
When using a rotation count greater than 1, the Carry flag contains the last bit rotated out of the MSB position.
The ROR (rotate right) instruction shifts each bit to the right and copies the lowest bit into the Carry flag and the highest bit position. The instruction format is the same as for SHL.
When using a rotation count greater than 1, the Carry flag contains the last bit rotated out of the LSB position.
The following code example uses CLC to clear the Carry flag; then, it performs a rotate carry right operation on the bl register.
The Overflow flag is set if the act of shifting or rotating a signed integer by one bit position generates a value outside the signed integer range of the destination operand.
The SHLD (shift left double) instruction shifts a destination operand a given number of bits to the left. The bit positions opened up by the shift are filled by the most significant bits of the source operand. The source operand is not affected, but the Sign, Zero, Auxiliary, Parity, and Carry flags are affected.
Syntax:
SHLD destination, source, count
Types of Operands:
SHLD reg16, reg16, CL/imm
SHLD mem16, reg16, CL/imm
SHLD reg32, reg32, CL/imm
A common way to store the integer is called little-endian order.
The following steps show how to shift an array of bytes 1 bit to the right:
After Step 6 is complete, all bits have been shifted 1 position to the right.
The SHL instruction performs unsigned multiplication when the multiplier is a power of 2. Shifting an unsigned integer n bit to the left multiplies it by 2 n. Any other multiplier can be expressed as the sum of powers of 2.
The x86 instruction set supports three formats for the IMUL instruction: one operand, two operands, and three operands.
Single-Operand Formats:
IMUL reg/mem
IMUL reg/mem
IMUL reg/mem
In the one-operand format, the multiplier and multiplicand are the same size and the product is twice their size.
Two-Operand Format:
1. 16-bit mode
Reg16, reg/mem
Reg16,imm
Reg16,imm
2. 32-bit mode
Reg32, reg/mem
Reg32,imm
Reg32,imm
Three-Operand Format:
1. 16-bit mode
IMUL reg16, reg/mem16, imm
IMUL reg16, reg/mem16, imm
2. 32-bit mode
IMUL reg32, reg/mem32, imm
IMUL reg32, reg/mem32, imm
Signed integer division is nearly identical to unsigned division, with one important difference:
The dividend must be sign-extended before the division takes place. Sign extension is the term used for copying the highest bit of a number into all of the upper bits of its enclosing variable or register.
The SBB (subtract with borrow) instruction subtracts both a source operand and the value of the Carry flag from a destination operand. The possible operands are the same as for the ADC instruction.
