Binary Multiplication: Bit by Bit Technique and Implementation in Assembly, Study notes of Design

An explanation of binary multiplication using the digit-by-digit method, also known as bit-by-bit technique. It covers the concept of partial products, the 'Shift and Add' approach in assembly language, and the advantages of higher-radix multiplication. The document also introduces Booth recoding for signed multiplications.

Typology: Study notes

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10/23/2017 Comp 411 - Fall 2017
Binary Multiplication
1
01011
+00101
10000
×0 1 2 3 4 5 6 7 8 9
0 0 0 0 0 0 0 0 0 0 0
1 0 1 2 3 4 5 6 7 8 9
2 0 2 4 6 8 10 12 14 16 18
3 0 3 6 9 12 15 18 21 24 27
4 0 4 8 12 16 20 24 28 32 36
5 0 5 10 15 20 25 30 35 40 45
6 0 6 12 18 24 30 36 42 48 54
7 0 7 14 21 28 35 42 49 56 63
8 0 8 16 24 32 40 48 56 64 72
9 0 9 18 27 36 45 54 63 72 81
×0 1
000
101
You’ve got to be
kidding… It can’t be
that easy
The key to multiplication was
memorizing a digit-by-digit table…
Everything else was just adding
pf3
pf4
pf5
pf8
pf9
pfa
pfd
pfe
pff

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10/23/2017 Comp 411 - Fall 2017

Binary Multiplication

×^0 1 2 3 4 5 6 7 8 9 10000

0 0 0 0 0 0 0 0 0 0 0 1 0 1 2 3 4 5 6 7 8 9 2 0 2 4 6 8 10 12 14 16 18 3 0 3 6 9 12 15 18 21 24 27 4 0 4 8 12 16 20 24 28 32 36 5 0 5 10 15 20 25 30 35 40 45 6 0 6 12 18 24 30 36 42 48 54 7 0 7 14 21 28 35 42 49 56 63 8 0 8 16 24 32 40 48 56 64 72 9 0 9 18 27 36 45 54 63 72 81

× 0 1 0 0 0 1 0 1

You’ve got to be kidding… It can’t be that easy

The key to multiplication was

memorizing a digit-by-digit table…

Everything else was just adding

10/23/2017 Comp 411 - Fall 2017

Digit by digit = bit by bit

A A 2 A 1 A 0

3 B B 2 B 1 B 0 3 A A 2 B 0 A 1 B 0 A 0 B 0 3 B 0 A 3 B 1 A 2 B 1 A 1 B 1 A 0 B 1 A 3 B 2 A 2 B 2 A 1 B 2 A 0 B 2

x

+ A 3 B 3 A 2 B 3 A 1 B 3 A 0 B 3

A (^) j B (^) i is a “partial product”

Multiplying N-digit number by M-digit number gives (N+M)-digit result

Easy part: forming partial products (just an AND gate since B (^) I is either 0 or 1) Hard part: adding M, N-bit partial products

X 0 1

The “Binary” Multiplication Table

Hey, that looks like an AND gate

Binary multiplication is implemented using the same basic longhand algorithm that you learned in grade school.

10/23/2017 Comp 411 - Fall 2017

Multiplier Unit-Block

We introduce a new abstraction to aid in the construction of multipliers called the “Unsigned Multiplier Unit-block”

We did a similar thing last lecture when we converted our adder to an add/subtract unit.

A (^) k are bits of the Multiplicand and B (^) i are bits of the Multiplier.

The P (^) i,k inputs and outputs represent “partial products” which are partial results from adding together shifted instances of the Multiplicand.

The initial P (^) 0,k is zero.

A B CO CI S

FA

A i

B i

Subtract

C i

C (^) i-

S (^) i

Add/Subtract Unit Block

A B CO CI S

FA

p (^) i-1,k

A (^) k B i

C (^) k C (^) k-

p (^) i,k

Unsigned Multiply Unit Block

10/23/2017 Comp 411 - Fall 2017

Simple Combinational Multiplier

tPD = 10 * t (^) PD

not 16

NB: this circuit only works for nonnegative operands

Components N * HA N(N-1) * FA

CoB HA A S

CoB HA A S

CoB HA A S

CoB HA A S

tPD = (2*(N-1) + N) * t (^) PD

To determine the timing specification of a composite combinational circuit we find the worst-case path for every output to any input.

Is this faster than our assembly code?

10/23/2017 Comp 411 - Fall 2017

Higher-Radix Multiplication

B (^) K+1,K A = 0A = 1A = 2A Just a shift = 3*A Requires adding

A (^) N-1 A (^) N-2 … A 3 A 2 A 1 A (^0) x B^ M-1^ B^ M-2^ …^ B^3 B^2 B^1 B^0

M/2 2

Idea: If we could use, say, 2 bits of the multiplier in generating each partial product we would halve the number of rows and halve the latency of the multiplier!

B (^) K+1,K A = 0A ⇨ 0 = 1A ⇨ A = 2A ⇨ 2A or 4A – 2A = 3*A ⇨ 4A – A

Booth’s insight: rewrite 2A and 3A cases, leave 4A for next partial product to do!

10/23/2017 Comp 411 - Fall 2017

Booth Recoding of Multiplier

B 2K+

B 2K

B 2K-

action

add 0

add A

add A

add 2*A

sub 2*A

sub A

sub A

add 0

A “1” in this bit means the previous stage needed to add 4A. Since this stage is shifted by 2 bits with respect to the previous stage, adding 4A in the previous stage is like adding A in this stage!

-2*A+A

-A+A

current bit pair from previous bit pair

An encoding where each bit has the following weights:

W(B (^) 2K+1) = -2 * 2 2K W(B (^) 2K) = 1 * 2 2K W(B (^) 2K-1) = 1 * 2 2K

Hey, isn’t that a negative number?

Yep! Booth recoding works for 2-Complement integers, now we can build a signed multiplier.

10/23/2017 Comp 411 - Fall 2017

Bigger Multipliers

  • Using the approaches described we can construct multipliers of arbitrary sizes, by considering every adder at the “bit” level
  • We can also, build bigger multipliers using smaller ones
  • Considering this problem at a higher-level leads to more “non-obvious” optimizations

×

A 4

B 4

4 P (^) H I

4 P (^) L O

10/23/2017 Comp 411 - Fall 2017

Can We Multiply With Less?

  • How many operations are needed to

multiply 2, 2-digit numbers?

  • 4 multipliers

4 Adders

  • This technique generalizes
    • You can build an 8-bit multiplier using 4 4-bit multipliers and 4 8-bit adders
    • O(N 2 + N) = O(N 2 )

AB

x CD

DB

DA

CB

CA

10/23/2017 Comp 411 - Fall 2017

A Trick

● The two middle partial products can be computed using a single multiplier and other partial products ● DA + CB = (C + D)(A + B) – (CA + DB) ● 3 multipliers 8 adders ● This can be applied recursively (i.e. applied within each partial product) ● Leads to O(N 1.58^ ) adders ● This trick is becoming more popular as N grows. However, it is less regular, and the overhead of the extra adders is high for small N

AB

x CD

DB

DA

CB

CA

10/23/2017 Comp 411 - Fall 2017

Let’s Try it By Hand

1) Choose 2, 2 digit numbers to multiply: ab × cd

2) Multiply digits: p1 = a x c, p2 = b x d, p3 = (c + d)(a + b)

3) Compute partial subtracted sum, SS = p3 - (p1 + p2)

4) Add as follows: p = 100 x p1 + 10 x SS + p

42 x 37 =?

42 x 37

p1 = 4 x 3 = 12, p2 = 2*7 = 14, p3 = (4+2)x(3+7) = 60

SS = 60 - (12 + 14) = 34

P = 1200 + 340 + 14 = 1554 = 42 x 37

10/23/2017 Comp 411 - Fall 2017

Next time

● We dive into floating-point arithmetic