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Chapter 1: Bipolar Junction Transistor (BJT)
1.1 Introduction:
On December 23, 1947, however, the electronics industry was to experience the advent of a completely new direction of interest and development. It was on the afternoon of this day that Walter H. Brattain and John Bardeen demonstrated the amplifying action of the first transistor at the Bell Telephone Laboratories.
1.2 Construction and Operation
The transistor is a three-layer semiconductor device consisting of either two n - and one p - type layers of material or two p - and one n - type layers of material. Or npn transistor and pnp transistor. Both are shown in Figure 1. 1 with the proper dc biasing as it is necessary to establish the proper region of operation for ac amplification. Figure 1. 1 : PNP and NPN transistors with the proper dc biasing.
- The three layers of BJT are called: Emitter (E), Base (B) and Collector (C).
- The emitter layer is heavily doped, the base lightly doped, and the collector lightly doped. This lower doping level decreases the conductivity (increases the resistance) of this material by limiting the number of āfreeā carriers.
- Forward biased B-E Junction in a PNP Transistor; Figure 1. 2 , the majority carriers (Holes) pass from P to N layer. Figure 1. 2 : Forward-biased BE junction of a pnp transistor.
- Without B-E biased; Figure 1. 3 A reverse biased B-C Junction in a PNP Transistor; Flow of minority carriers as indicated in the figure with zero of majority carriers. Figure 1. 3 : Reverse-biased BC junction of a pnp transistor. In Fig. 1 .5 both biasing potentials have been applied to a pnp transistor, a large number of majority carriers will diffuse across the forward-biased p-n junction into the n - type material.
The output set will relate an output current ( IC ) to an output voltage ( VCB ) for various levels of input current ( IE ) as shown in Figure 1. 6. The output or collector set of characteristics has three basic regions of interest, as indicated in Figure 1. 6 : the active, cutoff, and saturation regions. The active region is the region normally employed for linear (undistorted) amplifiers. In particular:
- For Active region IC ā
IE Figure 1. 6 : Output or collector characteristics for a common-base transistor amplifier.
- For Cut-off region^ IE =^0
- For^ saturation^ region^ VCB =^0 The common base short circuit amplification factor ādc=
IC
IE
1.4 Common-Emitter Configuration
Figure 1. 7 : Notation and symbols used with the common-emitter configuration: (a) pnp transistor; (b) npn transistor. Figure 1. 8 : Characteristics of a silicon transistor in the common-emitter configuration: (a) collector characteristics; (b) base characteristics.
Chapter 2: DC BiasingāBJTs
2.1 Introduction:
Basic relations that will be used in this chapter is as follows:
2.2 Operating Point (Q-Point)
Point Explanation A Zero current through the device (and zero voltage across it). point A would not be suitable B Good, it is out of cut off or saturation More linear spacing and therefore more linear operation C would allow some positive and negative variation of the output signal, but the peak to- peak value would be limited by the proximity of VCE = 0V/ IC = 0 mA. D Point D sets the device operating point near the maximum voltage and power level. The output voltage swing in the positive direction is thus limited if the maximum voltage is not to be exceeded.
For the BJT to be biased in its linear or active operating region the following must be true:
- The baseāemitter junction must be forward-biased ( p - region voltage more p ositive), with a resulting forward-bias voltage of about 0.6 to 0.7 V.
- The baseācollector junction must be reverse-biased ( n - region more p ositive), with the reverse-bias voltage being any value within the maximum limits of the device.
The double subscript notations: Example : Determine the following for the fixed-bias configuration of the figure below: (a) IBQ and ICQ. (b) VCEQ. (c) VB and VC. (d) VBC. Solution:
2.3.3 Transistor Saturation
The term saturation is applied to any system where levels have reached their maximum values. Saturation conditions are normally avoided because the baseācollector junction is no longer reverse-biased and the output amplified signal will be distorted.
Then : If IC= If VCE=0, Then the DC load line for different RC resistance is shown in the figure:
Example: Given the load line of the figure below and the defined Q - point, determine the required values of VCC , RC , and RB for a fixed-bias configuration
Collector-Emitter Loop Example:
Saturation level: As VCE=0, So in the previous example the saturation current is:
2.5 Voltage-Divider Bias
The analysis: R-Thevenin E- Thevenin Equivalent Circuit Then the resultant transistor circuit for the input loop can be drawn as follows: By KVL
Example: Determine VCE and IC for the following circuit:
Example: repeat the previous analysis if Ī²=
