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A series of questions and answers related to computer architecture, specifically focusing on risc (reduced instruction set computer) principles and mips (microprocessor without interlocked pipeline stages) assembly language. It covers topics such as risc principles, mips assembly syntax, directives, register usage, and instruction functionality. The questions are designed to test understanding of mips assembly programming concepts, including data manipulation, memory access, subroutine calls, and floating-point operations. It also includes questions on ieee 754 floating point format. This material is useful for students studying computer architecture and assembly language programming, providing a practical review of key concepts and techniques. The document serves as a study aid for exam preparation, offering complete solutions to each question to facilitate learning and comprehension.
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What does RISC stand for? Ans - Reduced Instruction Set Computer Which one of the following is a principle of RISC? Ans - Load-store instruction sets RISC incorporates several of the principles of the 8 Great Architecture ideas. One of them is that Make the Common Case __________________. Ans - Faster How many general purpose registers are available in MIPS Assembly? Ans - 32 Each MIPS Assembly line can contain: Ans - A directive, and instruction plus a comment A label in MIPS Assembly must__________________ Ans - Be the first thing on a line and end in a semicolon (:). A MIPS assembly program has two parts. The first part contains the data and is identified by the ________ directive. Ans
li $s1,10 Ans - Loads the integer value of 10 into register $s What is the value of Register $s1 after the following set of instructions? li $s1, addiu $s1,$s1,10 Ans - 20 What is the difference between the ADD and ADDU instruction? Ans - The ADDU allows negative numbers but does not check for overflow. Why is there no Subtract Immediate in MIPS? Ans - It would be redundant because you can add negative immediate numbers using the ADDI or ADDIU instruction. What is the result of the following Code Segment? .data MSG1: .asciiz "Hello Word" .text .globl main main: li $v0, la $a0,MSG syscall jr $ra Ans - Prints Hello World What is the purpose of the Line #8 in the following Code Segment? .data MSG1: .asciiz "Hello Word" .text .globl main main: li $v0, la $a0,MSG syscall jr $ra <--- Ans - Returns control to the operating system or stops the program What is the purpose of line #6?
Match the service code that is loaded into register $v0 with the description of the service. 4 Ans - Print String Match the service code that is loaded into register $v0 with the description of the service. 5 Ans - Read an Integer Match the service code that is loaded into register $v0 with the description of the service. 6 Ans - Read a Single Floating Point number Match the service code that is loaded into register $v0 with the description of the service. 7 Ans - Read a Double Floating Point Number Match the service code that is loaded into register $v0 with the description of the service. 8 Ans - Read a string Match the service code that is loaded into register $v0 with the description of the service. 10 Ans - Exit the program Match the service code that is loaded into register $v0 with the description of the service. 11 Ans - Print a character What does the $gp or register 28 do? Ans - Points to the middle of the 64K of memory in the static data segment When printing an integer, the number to be printed must be loaded into which register? Ans - $a Registers $a0 through $a1 are generally used for ____________. Ans - First four parameters of a subroutine call To print a string, the address of the string must be loaded into what register? Ans - $a
When reading an integer, the results of the read operation (if successful) will place the value into which register? Ans - $v Which registers are used to pass and return floating point values? Ans - $f0 and $f The $sp register contains the _____________. Ans - stack pointer Which register always contains the value 0 (zero)? Ans - $zero or 0 What is the function of the following instruction? slt $s1,$s2,$s3 Ans - Checks to see if the contents of $s2 is less than $s3 and if so sets $s1 to 1 else it sets $s1 to zero. What will be the result of the following code segment? li $s1, bne $s1,$zero,done add $s1,$s1,$zero Ans - The Program Counter will be updated with the address of the label done. The 16 bit immediate field in the branch instruction must have the following operation performed before it can be used. Which are they? Ans - Shift left 2 positions, extended to 32 bits, and added to the PC+ The jr or Jump Register instruction allows the programmer which of the following? Ans - A flexible branch to a location specified by a register that can be modified during run-time What is the difference between a jump and a branch instruction? Ans - A branch instruction is based on the difference from the next intruction (PC+4) while the Jimp is an absolute address The jal or jalr instruction is used most often to do which of the following? Ans - Call a subroutine
bne. $s1,$zero, top Ans - All three Match the items on the left with those on the right. Assembly Directives: .asciiz str Ans - store the string in memory with a null terminator .ascii str Ans - store the string in memory but not null- terminated .byte b1,b2,b3,...bn Ans - store values in successive bytes of memory .word w1,w2,w3,....wn Ans - store the n 32 bit items in memory .double d1,d2,d3,.....dn Ans - store the n items as double precision floating point number .float f1,f2,f3,.....fn Ans - store the n items as single precision floating point number .half h1,h2,h3,.....hn Ans - store n items as 16 bit value .space n Ans - Allocate n number of bytes in consecutive storage locations .align n Ans - align next address on a boundary. If n=2 it is a full word boundary .globl sym Ans - declares the label sym as a global that can be referenced from other files Given the code below, which of the commands below will load the 4th full word contents into register $s1. array .space 100 . . la $s2,array Ans - lw $s1,12($s2)
(4th word starts at 12) Which command returns from a called function? Ans - jr $ra Finish the line of code to load a single byte of memory from a storage location called array into register $s1. la $s2,array lw $s1,________ Ans - array Before calling a function with the jal or jalr command you must at least perform which of the following: Ans - Allocate at least 1 word of memory from the stack and save the $ra register. Finish the line of code to store a single byte of memory from a storage location called array from register $s1. la $s2,array sw $s1,________ Ans - array Which command aligns the next line of code on a full word boundary? Ans - .align 2 What function does the following line of code perform? addiu $sp,$sp,-32 Ans - Sets aside 32 bytes of 8 words of memory from the stack pointer What does the lui operation perform. Ans - Load 16 bytes from the immediate field into the upper part of the register Which of the following lines of code is a valid for the Load halfword unsigned operation? Ans - lh $s2,array Questions 1-3 are based on converting the number -121. into a IEEE 754 32 bit Floating Point Format. What is the normalized binary mantissa or fraction portion of the IEEE 754 version of the floating point value for -121.0625? ( Make sure it is 23 bits) Ans - 11100100010000000000000
The logical AND gate has a truth table such that given two input A and B, the result of A AND B is 1 if and only if: Ans - Both A and B is 1 The logical OR gate has a truth table such that given two input A and B, the result of A OR B is one if and only if: Ans - Either A or B is 1 or if both A and B is 1 The Exclusive Or gate is unique and very important in Computer Science. The Truth Table of the Exclusive Or gate is such that given an input A and B, the XOR gate produces a 1 if and only if: Ans - Either A or B are 1 but not both Look at the following image. What does it represent?(It's a 2- Decoder. Look up a 2-4 Decoder) Ans - 2-4 Decoder The image below is an example of what:(It's a 2 Input Multiplexer. Look up a 2 Input Multiplexer. Ans - 2 Input Multiplexer The image below is an example of which?(It's a Program Logic Array.) Ans - Program Logic Array Identity Law Ans - A+0=A and A1=A Zero and One Laws Ans - A0=0 and A+1 = Inverse Laws Ans - A+A'=A and AA' = Idempotent Laws Ans - A + A = A and AA = A Double Negation Law Ans - A'' = A
Absorption Laws Ans - A(A+B) = A and A+(AB) = A Commutative Laws Ans - A+B=B+A and AB=BA Associative Laws Ans - A+(B+C) = (A+B)+C andA(BC) = (AB)C Distributive Laws Ans - A(B+C) = AB + A*C DeMorgan's Law Ans - (A+B)' = A'B' or (AB)' = A'+B' Which one of the following equations is in Sum-Of-Products form? Ans - (AB) + (A'B') Modern day computers are built entirely using either NAND or NO gates. Which one of the Great Architecture Principles does this illustrate? Ans - Make the simple case fast A pipeline has five stages. Use all lower case letters and put them in order of execution. Ans - Stage 1: instruction fetch Stage 2: register read Stage 3: ALU Operation Stage 4: data access Stage 5: register write Consider the following set of instructions: lw $10,20($1) sub $11, $2, $ add $12, $3, $ lw $13, 24($1) add $14, $5, $ How many clock cycle will it take to finish this sequence in a pipeline architecture? Ans - 9 Match the left side and the right side. Match the 1 bit signal on the left w/ the affect of Deasserting it on the right. RegDest Ans - The register file destination number for the Write register comes from the rt field.
ALUSrc Ans - The first ALU operand is sign-ext immediate field. Match the left side and the right side. Match the 1 bit signal on the left with the affect of Asserting it on the right. PCSrc Ans - PC is replaced by branch target. Match the left side and the right side. Match the 1 bit signal on the left with the affect of Asserting it on the right. MEMRead Ans - Content of memory at the location specified by the Address input is put on the Memory data output. Match the left side and the right side. Match the 1 bit signal on the left with the affect of Asserting it on the right. MEMWrite Ans - The Write Data input is written to the Address input. Match the left side and the right side. Match the 1 bit signal on the left with the affect of Asserting it on the right. MemToReg Ans - The value fed to the register file input comes from Memory. Let's take a look at the following instruction sequence. sub $2, $1, $ and $12, $2, $ or $13, $6, $ add $14, $2, $ sw $14, 100($2) What is the hazard? Ans - The last four instructions is $ which is written in the first instruction. What is the definition of temporal locality? Ans - Items that are referenced often should be made available. What is the definition of spatial locality? Ans - Reference items that are close to each other
What is the difference between SRAM and DRAM? Ans - SRAM is faster but more expensive. DRAM needs to be refreshed more often. Match the item on the left with the definition on the right. Hit Ans - Item found in a specified level of hierarchy Match the item on the left with the definition on the right. Hit Time Ans - Time required to access the desired item in a specified level of hierarchy (includes the time to determine if the access is a hit) Match the item on the left with the definition on the right. Miss Ans - Item not found in a specified level of hierarchy Match the item on the left with the definition on the right. Miss Penalty Ans - The additional time required to service the miss. Match the item on the left with the definition on the right. Hit Rate Ans - Fraction of accesses that are in a specified level of hierarchy. Match the item on the left with the definition on the right. Miss Rate Ans - Fraction of accesses that are not in a specified in a level of hierarchy. Match the item on the left with the definition on the right. Block Ans - Unit of information that is checked to reside in a specified level of hierarchy and is retrieved from the next lower level on a The index of the cache is to take the lower N bits of the physical address. What is usually the tag? Ans - The upper remaining bits