Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
A lab report on combinational logic analysis and hierarchical modeling. It includes a theoretical introduction, truth tables, and circuit diagrams for various logic gates and their combinations. The report covers the design and implementation of two modules, 'kabs' and 'extrareportgroup8', using nand gates. A detailed analysis of the logic operations and the corresponding truth tables. It also includes an exercise with input and output values for the designed circuits. This lab report would be useful for students studying computer organization, digital logic design, and related topics in computer science and electrical engineering programs.
Typology: Exercises
1 / 6
This page cannot be seen from the preview
Don't miss anything!
W1= ๐ฬ . ฬ ๐ฬ = ๐ฬ + b W2= a^.^ w^^1 = a^ + a^.^ b = a + a^.^ b = a +b W3= b^.^ w^^1 = b^ + a^.^ b = a^.^ b^ + b^ =a+ b W4= w^ 2.^ w^^3 = w^^2 + w^^3 = a + b^ + a +^ b^ = (๐ฬฟ. ๐ฬ ) + (๐ฬ . b )= ๐๐ฬ + ๐๐ฬ = ๐ โ ๐ W5= c^.^ w^^4 = c^ + a^ โ^ b x=c.w5+w4.w5=w5(c+w4) y= w^^5_._^ w^^1 W1 Truth Table: a b ๐ ฬ b^ ๐ฬ + b T T F F F T F F T T F T T F T F F T T T W2 Truth Table: a b (^) ๐ ฬ ๐ฬ +b T T F T T F F F F T T T F F T T W3 Truth Table:
y Truth Table: w 5 w (^1) w (^5) + w 1 F T T T F T F F F F F F
โข After assigning the values in the pin planner, we will have this: The results were checked on the hardware and were proven correct. Exercise:
