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EE207: Digital Systems I, Semester I

CHAPTER 3 -ii:

Combinational Logic Design –

Design Procedure, Encoders/Decoders

(Sections 3.4 – 3.6)

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Overview

• Design Procedure
• Code Converters
• Binary Decoders
  • Expansion
  • Circuit implementation
• Binary Encoders
• Priority Encoders

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Design Procedure

1. Determine the required number of inputs and outputs and assign variables to them.
2. Derive the truth table that defines the required relationship between inputs and outputs.
3. Obtain and simplify the Boolean function (K-maps, algebraic manipulation, CAD tools, …). Consider any design constraints (area, delay, power, available libraries, etc).
4. Draw the logic diagram.
5. Verify the correctness of the design.

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Design Example

• Design a combinational circuit with 4 inputs

that generates a 1 when the # of 1s equals the

# of 0s. Use only 2-input NOR gates

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BCD-to-Excess-3 Code Converter

• Design a circuit that converts a binary-coded- decimal (BCD) codeword to its corresponding excess-3 codeword.
• Excess-3 code: Given a decimal digit n , its corresponding excess-3 codeword (n+3) 2 Example: n=5  n+3=8  (^1000) excess- n=0  n+3=3  (^0011) excess-
• We need 4 input variables (A,B,C,D) and 4 output functions W(A,B,C,D), X(A,B,C,D), Y(A,B,C,D), and Z(A,B,C,D).

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BCD-to-Excess-3 Converter (cont.)

• The truth table relating the input and output variables is shown below.
• Note that the outputs for inputs 1010 through 1111 are don't care s (not shown here).

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BCD-to-Excess-3 Converter (cont.)

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Another Code Converter Example:

BCD-to-Seven-Segment Converter

• Seven-segment display:
  • 7 LEDs (light emitting diodes), each one controlled by an input
  • 1 means “on”, 0 means “off”
  • Display digit “3”?
    • Set a, b, c, d, g to 1
    • Set e, f to 0

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d

a

b

e c

f g

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BCD-to-Seven-Segment (cont.)

Truth Table

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Digit wxyz abcdefg

0 0000 1111110 1 0001 0110000 2 0010 1101101 3 0011 1111001 4 0100 0110011 5 0101 1011011 6 0110 X 7 0111 11100X

Digit wxyz abcdefg 8 1000 1111111 9 1001 111X 1010 XXXXXXX 1011 XXXXXXX 1100 XXXXXXX 1101 XXXXXXX 1110 XXXXXXX 1111 XXXXXXX

??

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Decoders

• A combinational circuit that converts binary

information from n coded inputs to a

maximum 2 n^ decoded outputs

 n-to- 2 n^ decoder

• n-to-m decoder, m ≤ 2 n

• Examples: BCD-to-7-segment decoder, where

n=4 and m=

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2-to-4 Decoder

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2-to-4 Active Low Decoder

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3-to-8 Decoder (cont.)

• Three inputs, A 0 , A 1 , A 2 , are decoded into eight

outputs, D 0 through D 7

• Each output D i represents one of the minterms of the

3 input variables.

• D i = 1 when the binary number A 2 A 1 A 0 = i
• Shorthand: D i = m i
• The output variables are mutually exclusive ; exactly

one output has the value 1 at any time, and the other seven are 0.

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