Combinational Logic - Digital Logic Design - Lecture Slides, Slides of Digital Logic Design and Programming

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Lecture No. 13

Combinational Logic

Recap

 Functions having multiple outputs

 Comparator

 Quine-McCluskey Method (two variations)

 Odd-Prime Number checker circuit

Odd Prime Number (table2)

Minterm A B C D E used 1 0 0 0 0 1  3 0 0 0 1 1  5 0 0 1 0 1  17 1 0 0 0 1  7 0 0 1 1 1  11 0 1 0 1 1  13 0 1 1 0 1  19 1 0 0 1 1  23 1 0 1 1 1  29 1 1 1 0 1  31 1 1 1 1 1 

Minterms Variable removed used 1,3 2  1,5 4  1,17 16  3,7 4  3,11 8 3,19 16  5,7 2  5,13 8

Odd Prime Number (table3)

Minterms Variable removed used 1,3,5,7 2, 1,3,17,19 2, 3,7,19,23 4,

Odd Prime Number (table4)

Odd Prime Number (table5)

AC DE

ACD E

BCD E

ACDE

ABCE

AB E

BC E

B DE

x x x x x x x x x x x x x x x x x x x x x x

SOP Implementation

NOT Gate level AND Gate level OR Gate level

POS Implementation

NOT Gate level OR Gate level AND Gate level

Adjacent 1s Detector Circuit

 SOP Implementation

 Directly from function table

 Simplified implementation

 Implementation using NAND gates

Adjacent 1s Detector Function Input Output Input Output A B C D F A B C D F 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 1 1 0 1 0 0 0 1 1 0 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 0 1 1 1 1 0 1 0 1 1 1 1 1 1 1 1 1

SOP Expression Simplification AB\CD 00 01 11 10 00 0 0 1 0 01 0 0 1 1 11 1 1 1 1 10 0 0 1 0

SOP based Simplified Circuit

A D C B F

 POS Implementation

 Directly from function table

 Simplified Implementation

 Implementation using NOR Gates

Adjacent 1s Detector Circuit

POS Implementation

A D C B F