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EE 4504 Section 1 1
EE 4504
Computer Organization
Dr. N. J. Davis
Spring 1997
EE 4504 Section 1 2
Course Objectives
Review development of computer systems
Examine the operation of the major
building blocks of a computer system
Investigate performance enhancements for
each component
EE 4504 Section 1 3
EE 4504
Computer Organization
Section 1
Introduction to Computer Systems
EE 4504 Section 1 4
Objectives
Review historical development of
computer systems
Identify design levels for computer system
development
Discuss descriptive and design tools for
each design level
Compare and contrast various performance
metrics for computer systems
EE 4504 Section 1 7
Computer Organization
Synonymous with āarchitectureā in many
uses and textbooks
We will use it to mean the underlying
implementation of the architecture
Transparent to the programmer
An architecture can have a number of
organizational implementations
- Control signals
- Technologies
- Device implementations
EE 4504 Section 1 8
What is a computer?
Historically, a computer was a job title, not
a piece of equipment!
Requirements of a computer:
- Process data
- Store data
- Move data between the computer and the outside world
- Control the operation of the above
Figure 1.1 Functional view of a computer
EE 4504 Section 1 9
History of Computers
Mechanical Era (1600s-1940s)
- Wilhelm Schickhard (1623) Ā» Astronomer and mathematician Ā» Automatically add, subtract, multiply, and divide
- Blaise Pascal (1642) Ā» Mathematician Ā» Mass produced first working machine ( copies) Ā» Could only add and subtract Ā» Maintenance and labor problems
- Gottfried Liebniz (1673) Ā» Mathematician and inventor Ā» Improved on Pascalās machine Ā» Add, subtract, multiply, and divide
EE 4504 Section 1 10
- Charles Babbage (1822) Ā» Mathematician Ā» āFather of modern computerā Ā» Wanted more accuracy in calculations Ā» Difference engine Government / science agreement Automatic computation of math tables Ā» Analytic engine Perform any math operation Punch cards Modern structure: I/O, storage, ALU Add in 1 second, multiply in 1 minute Ā» Both engines plagued by mechanical problems
- George Boole (1847) Ā» Mathematical analysis of logic Ā» Investigation of laws of thought
EE 4504 Section 1 13
The Electronic Era
Generation 1 (1945 - 1958)
ā ENIAC
Ā» Developed for calculating artillery firing tables Ā» Designed by Mauchly and Echert of the University of Pennsylvania Ā» Generally regarded as the first electronic computer Colossus probably the first, but was classified until recently Ā» BIG! 18,000 tubes 70,000 resistors 10,000 capacitors 6,000 switches 30 x 50 feet 140 kW of power Ā» Decimal number system used Ā» Programmed by manually setting switches EE 4504 Section 1 14
- IAS (Institute for Advanced Studies) Ā» von Neumann and Goldstine Ā» Took idea of ENIAC and developed concept of storing a program in the memory Ā» This architecture came to be known as the āvon Neumannā architecture and has been the basis for virtually every machine designed since then Ā» Features Data and instructions (programs) are stored in a single read-write memory Memory contents are addressable by location, regardless of the content itself Sequential execution
- Lots of initial and long-term fighting over patents, rights, credits, firsts, etc.
EE 4504 Section 1 15
Generation 2 (1958 - 1964)
- Technology change
- Transistors
- High level languages
- Floating point arithmetic
Generation 3 (1964 - 1974)
- Introduction of integrated circuits
- Semiconductor memory
- Microprogramming
- Multiprogramming
Generation 4 (1974 - present)
- Large scale integration / VLSI
- Single board computers
Generation 5 (? - ?)
ā VLSI / ULSI
- Computer communications networks
- Artificial intelligence
- Massively parallel machines EE 4504 Section 1 16
Summary of Generations
Generation Example Machines
Hardware Software Performance
1 ENIAC, UNIVAC I, IBM 700
Vacuum tubes, magnetic drums
Machine code, stored programs
2 Kb memory, 10 KIPS
2 IBM 7094 Transistors, core memory
High level languages
32 Kb memory, 200 KIPS 3 IBM 360 370, PDP 11
ICs, semiconductor memory, microprocesso rs
Timesharing, graphics, structured programming
2 Mb memory, 5 MIPS
4 IBM 3090, Cray XMP, IBM PC
VLSI, networkes, optical disks
Packaged programs, object-oriented languages, expert systems
8 Mb memory, 30 MIPS
5 Sun Sparc, Intel Paragon
ULSI, GaAs, parallel systems
Parallel languages symbolic processing, AI
64 Mb memory, 10 GFLOPS
EE 4504 Section 1 19
Four Levels of Computer
Description
Global system structure
- Overall system structure is defined
- Major components identified Ā» Processors Ā» Control modules Ā» Memory modules Ā» Interconnection structure
- Mostly a static description -- āblack boxā approach
Processor level
- Architectural Features specified Ā» Interfaces Ā» Instruction sets Ā» Data Representation
- More detailed individual component specification
EE 4504 Section 1 20
Register level
- Specify internal operation of processor-level components at the word level
- Primitives: Ā» Registers Ā» Counters Ā» Memories Ā» ALUs Ā» Clocks Ā» Combinational logic
Gate level
- Specify operations at the individual bit level
- Gates are primitive elements
- Very cumbersome to do manually (logic minimization, etc.)
EE 4504 Section 1 21
Global Descriptive Tools
Flynnās Taxonomy
- The most universally excepted method of classifying computer systems
- Relies on a block diagram approach
- Published in the Proceedings of the IEEE in 1966
- Any computer can be placed in one of 4 broad categories Ā» SISD: Single instruction stream, single data stream Ā» SIMD: Single instruction stream, multiple data streams Ā» MIMD: Multiple instruction streams, multiple data streams Ā» MISD: Multiple instruction streams, single data stream
EE 4504 Section 1 22
Instruction Stream
Data Stream Control Unit
Processor
SISD system architecture of [Fly66]
EE 4504 Section 1 25
Control Unit 1
Processor 1
Control Unit 0
Processor 0
Control Unit N-
Processor N-
Instruction Stream 0
Instruction Stream 1
Instruction Stream N-
Data Stream
MISD system architecture of [Fly66] EE 4504 Section 1 26
- Advantages of Flynn Ā» Universally accepted Ā» Compact Notation Ā» Easy to classify a system (?)
- Disadvantages of Flynn Ā» Very coarse-grain differentiation among machine systems Ā» Comparison of different systems is limited Ā» Interconnections, I/O, memory not considered in the scheme
Other global level tools
- Tendency to rely on block diagrams and very coarse performance measures Ā» Processor-memory-switch notation of [BeN71] uses block diagrams with 7 basic component types
EE 4504 Section 1 27
PMS description of IBM 370/155 [Bae80] EE 4504 Section 1 28
Processor Level Descriptive Tools
At this level, the operation of the global
level components and their interfaces must
be defined
Items to be specified include:
- Data formats Ā» Word lengths Ā» Instruction formats Ā» Data representation
- Memory accessing
- Instruction set and its operation
Specification takes the appearance of a
software program
- Permits direct simulation of the machineās operation
Typical tool is ISP -- Instruction Set
Processor
EE 4504 Section 1 31
RTL example of the āMano Machineā [Man93] EE 4504 Section 1 32
RTL example of the āMano Machineā [Man93] (cont)
EE 4504 Section 1 33
Gate Level Descriptive Tools
At the gate level, descriptive tools rely on
combinational and sequential design
techniques as in EE 2504 and EE 4505/
To specify a complete computer system at
this level is a staggering task!
Current automated design tools have
replaced the manual methods of state
tables, truth tables, etc.
EE 4504 Section 1 34
VHDL -- A Universal Design
Tool
Background
- DoD sponsored the VHSIC Hardware Design Language (VHDL) program in the 1980s to promote the rapid insertion of advanced microelectronic components into operational systems -- cut design and development time
- Speed process by: Ā» Increasing communication among defense contractors Ā» Increasing efficiency of CAD/CAM capabilities Ā» Improving functioning of multi-contractor teams
Objectives
- Support hardware technologies and design methodologies
- Support design styles and automation tools
- Support management of design data
EE 4504 Section 1 37
Entity interface contains / defines
externally visible items
- Ports
- Data parameters
- Generic parameters
- Declarations and assertions
Entity body describes alternative
implementations of the entity
- Architectural Ā» Data flow approach where body statements are executed in parallel Ā» Function decomposition composed of other entities
- Behavioral Ā» Control flow approach -- statements executed sequentially Ā» No information on structural decomposition
EE 4504 Section 1 38
architecture architecture_view of full_adder is view:
block begin SUM <= X xor Y xor Cin Cout <= (X and Y) or (Y and Cin) or (Cin and X) end block; end architecture_view
Full adder
X
Y
Cin
SUM
Cout
EE 4504 Section 1 39
architecture behavior_view of full_adder is view:
block begin
process (X, Y, Cin) variable S: bit_vector (1 to 3):= X&Y&Cin; variable NUM: integer range 0 to 3 :=0; begin for i:= 1 to 3 loop if S(i) = ā1ā then NUM := NUM+1; end if; end loop; case NUM is when 0 => Cout<=0; SUN<=0; when 1 => Cout <=0; SUM<=1; when 2 => Cout<=1; SUM<=0; when 3=> Cout<=1; SUM<=1; end process; end block; end behavior_view EE 4504 Section 1 40
Architectural description can contain
references to other entities
- Designs can use libraries of entities of previously designed āpartsā to speed the process
Interface
Body
Interface
Body
Interface
Body
Interface
Body
Interface
Body
Interface
Body
