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Basic Computer organization

and design

THE BASIC COMPUTER

The Basic Computer has two components, a processor and

memory

The memory has 4096 words in it

12

, so it takes 12 bits to select a word in memory

Each word is 16 bits long

CPU RAM

0

4095

15 0

INSTRUCTION FORMAT

A computer instruction is often divided into two parts

An opcode (Operation Code) that specifies the operation for that

instruction

▫ An address that specifies the registers and/or locations in

memory to use for that operation

Instruction codes

Opcode Address

Instruction Format

1514 12 0

I

11

Addressing

mode

ADDRESSING MODES

The address field of an instruction can represent either

▫ Immediate value

▫ Direct address:

▫ Indirect address:

Instruction codes

0

ADD

22

Operand 457

1

ADD

35

1350 300

Operand

1350

AC

AC

Direct addressing Indirect addressing

COMMON BUS SYSTEM

The registers in the Basic Computer are connected

using a bus

This gives a savings in circuitry over complete

connections between registers

Registers

COMMON BUS SYSTEM

Registers

S

S

S

Bus

Memory unit

4096 x 16

LD INR CLR

Address

Write Read

AR

LD INR CLR

PC

LD INR CLR

DR

LD INR CLR

AC ALU

E

INPR

IR

LD

LD INR CLR

TR

OUTR

LD

Clock

16-bit common bus

7 1 2 3 4 5 6

BASIC COMPUTER INSTRUCTIONS

Instructions

Basic Computer Instruction Format

I

Opcode Address

Memory-Reference Instructions (OP-code = 000 ~ 110)

Register-Reference Instructions (OP-code = 111, I = 0)

Input-Output Instructions (OP-code =111, I = 1)

0 1 1 1 Register operation

I/O operation 1 1 1 1

BASIC COMPUTER INSTRUCTIONS

Hex Code

Symbol I = 0 I = 1 Description

AND 0xxx 8xxx AND memory word to AC

ADD 1xxx 9xxx Add memory word to AC

LDA 2xxx Axxx Load AC from memory

STA 3xxx Bxxx Store content of AC into memory

BUN 4xxx Cxxx Branch unconditionally

BSA 5xxx Dxxx Branch and save return address

ISZ 6xxx Exxx Increment and skip if zero

CLA 7800 Clear AC

CLE 7400 Clear E

CMA 7200 Complement AC

CME 7100 Complement E

CIR 7080 Circulate right AC and E

CIL 7040 Circulate left AC and E

INC 7020 Increment AC

SPA 7010 Skip next instr. if AC is positive

SNA 7008 Skip next instr. if AC is negative

SZA 7004 Skip next instr. if AC is zero

SZE 7002 Skip next instr. if E is zero

HLT 7001 Halt computer

INP F800 Input character to AC

OUT F400 Output character from AC

SKI F200 Skip on input flag

SKO F100 Skip on output flag

ION F080 Interrupt on

IOF F040 Interrupt off

Instructions

CONTROL UNIT

Control unit (CU) of a processor translates from

machine instructions to the control signals for the

microoperations that implement them

Control units are implemented in one of two ways

Hardwired Control

CU is made up of sequential and combinational circuits to

generate the control signals

It can be optimized to produce a fast mode of operation

Microprogrammed Control

A control memory on the processor contains microprograms that

activate the necessary control signals

Easier to modify

We will consider a hardwired implementation of the

control unit for the Basic Computer

Instruction codes

TIMING AND CONTROL

Control unit of Basic Computer

Timing and control

Instruction register (IR)

3 x 8

decoder

7 6 5 4 3 2 1 0

I

D

15 14.... 2 1 0

4 x 16

decoder

4-bit

sequence

counter

(SC)

Increment (INR)

Clear (CLR)

Clock

Other inputs

Control

signals

D

T

T

Combinational

Control

logic

recap

• Program->sequence of instructions->instruction-

opcode+(address or operand)-> sequence of

Microoperation-> executed by control unit

• Instruction

Memory reference, Register reference and IO

• Cpu consist of

set of registers->connected through common bus

Control unit

 instruction decoder – to enable corresponding

microprogrammed control

 Sequence counter - to generate timing signal

INSTRUCTION CYCLE

In Basic Computer, a machine instruction is executed in

the following cycle:

1. Fetch an instruction from memory

2. Decode the instruction

3. Read the effective address from memory if the instruction has an

indirect address

4. Execute the instruction

After an instruction is executed, the cycle starts again at

step 1, for the next instruction

Note : Every different processor has its own (different)

instruction cycle

DETERMINE THE TYPE OF INSTRUCTION

= 0 (direct)

D'7IT 3 : AR M[AR]

D' 7 I'T 3 : Nothing

D 7 I'T 3 : Execute a register-reference instr.

D 7 IT 3 : Execute an input-output instr.

Instrction Cycle

Start

SC 

AR  PC

T

IR  M[AR], PC  PC + 1

T

AR  IR(0-11), I  IR(15)

Decode Opcode in IR(12-14),

T

D

(Register or I/O) = 1 = 0 (Memory-reference)

I I

Execute

register-reference

instruction

SC  0

Execute

input-output

instruction

SC  0

AR  M[AR] Nothing

= 0 (register) (I/O) = 1 (indirect) = 1

T3 T3 T3 T

Execute

memory-reference

instruction

SC  0

T

REGISTER REFERENCE INSTRUCTIONS

r = D

7

IT

3

=> Register Reference Instruction

B

i

= IR(i) , i=0,1,2,...,

• D

7

= 1, I = 0

• Register Ref. Instr. is specified in b

0

~ b

11

of IR

• Execution starts with timing signal T

3

Instruction Cycle

Register Reference Instructions are identified when

r: SC  0

CLA rB

11

: AC  0

CLErB

10

: E  0

CMA rB

9

: AC  AC’

CME rB

8

: E  E’

CIR rB

7

: AC  shr AC, AC(15)  E, E  AC(0)

CIL rB

6

: AC  shl AC, AC(0)  E, E  AC(15)

INC rB

5

: AC  AC + 1

SPA rB

4

: if (AC(15) = 0) then (PC  PC+1)

SNA rB

3

: if (AC(15) = 1) then (PC  PC+1)

SZA rB

2

: if (AC = 0) then (PC  PC+1)

SZE rB

1

: if (E = 0) then (PC  PC+1)

HLT rB

0

: S  0 (S is a start-stop flip-flop)