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1.Q10. provide storage internal to the CPU.: d. all of the above 2. Q1. The interconnection structure must support which transfer? a. memory to processor b. processor to memory c. I/O to or from memory d. all of the above: d. all of the above 3. Q2. Computer refers to those attributes that have a direct impact on the logical execution of a program.: d. architecture 4. Q3. Architectural attributes include .t a. 1/O mechanisms 5. Q4. attributes include hardware details transparent to the pro- grammer.: b. Organizational 6. Q5. It is a(n) design issue whether a computer will have a multiply instruction.: a. architectural 7. Q6. An I/O device is referred to as a -.c. peripheral 8. Q8. The moves data between the computer and its external environment.: b. I/O 9. Q9. A common example of system interconnection is by means of a .1b. system bus 10. Q11.The performs the computer's data processing functions.- tc. ALU 11. Q12. Virtually all contemporary computer designs are based on concepts developed by at the Institute for Advanced Studies, Princeton.: - John von Neumann 12. Q7. The stores data: c. main memory 13. Q15. A(n) is generated by some condition that occurs as a result of an instruction execution.: c. program interrupt 14. Q14. The von Neumann architecture is based on which concept?: d. all of the above 15. Q16. The data lines provide a path for moving data among system modules and are collectively called the .. c. data bus 16. Q17.The was the world's first general-purpose electronic digital computer.: c. ENIAC 17. Q18. The PDP-8 used . b. integrated circuits 18. Q19. The interprets the instructions in memory and causes them to be executed.: b. control unit 19. Q13. The processing required for a single instruction is called a(n) cycle.: b. fetch 20. Q20. Referred to as the von Neumann architecture and is based on key concepts?: d. All answers above 40. Q20. Internal memory capacity is typically expressed in terms of ..C. Bytes 41.Q1.The enables the RAM chip to preposition bits to be placed on the databus as rapidly as possible.: D. Buffer 42. Q2. A DDR3 module transfers data at a clock rate of MHz.: B. 800 to 1600 43. Q3. Theoretically, a DDR module can transfer data at a clock rate in the range of MHz.: A. 200 to 600 44. Q4. Which access time RAM is fastest?: C. RDRAM 45. Q5. Compare transfer rate of SDRAM, RDRAM, DDR.: C. RDRAM > DDR > SDRAM 46. Q6. increases the prefetch buffer size to 8 bits.: C. DDR3 47. Q7. increases the data transfer rate by increasing the opera- tional frequency of the RAM chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip.: A. DDR2 48. Q8. can send data to the processor twice per clock cycle.: C. DDR-DRAM 49. Q9. The exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without imposing wait states.: B. SDRAM 50. Q10. can be caused by power supply problems or alpha parti- cles.: A. Soft errors 51. Q11. can be caused by harsh environmental abuse, manufac- turing defects, and wear.: B. Hard errors 52. Q12. With the microchip is organized so that a section of mem- ory cells are erased in a single action.: A. Flash memory 53.Q13.A contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it.: C. ROM 54.Q14. Ina , binary values are stored using traditional flip-flop logic-gate configurations.: B. SRAM 55. Q15. Which of the following memory types are nonvolatile? A. Erasable PROM B. Programmable ROM C. Flash memory: D. All of the above 56. Q16. One distinguishing characteristic of memory that is designated as is that it is possible to both to read data from the memory and to write new data into the memory easily and rapidly.: EPROM 57. Q17. Which properties do all semiconductor memory cells share? A. They exhibit two stable states which can be used to represent binary 1 and 0 B. They are capable of being written into to set the state C. They are capable of being read to sense the state: D. All of the above 58. Q18. The basic element of a semiconductor memory is the ..............08 A. Memory cell 59. Q19. A characteristic of ....... is that it is volatile: B.RAM. 60. Q20. The traditional forms of RAM used in computers are ............ D. DRAM and SRAM 61.Q1.The areas between pits are called..................... A. lands 62. Q2. Two different parity calculations are carried out and stored in separate blocks on different disks: B. RAID level 6 characteristics 63. Q3. FThe consists of the access time plus any additional time required before a second access can commence.: B memory cycle time 64. Q4. Contiguous blocks data are read and written in: A. Physical records 65. Q5. The sum of the seek and the rotational delay; the time it takes to get into position to read/write.: D. Access time 66. Q6. A typical computer system is equipped with a hierarchy of memory subsystems, some internal to the system and some external.: True 67. Q7. An error-correcting code enhances the reliability of the memory at the cost of added complexity.: A. True 68. Q8. Semiconductor memory comes in packaged chips: A. True 69. Q9. Individual blocks of data can be directly addressed by track and sector: D. CAV advantage 70. Q10. Which is not a magnetic disk?: C. SSD 71.Q11. Data are transferred to and from the ISK iM........cssseeeeeee Sector 72. Q12. The SSDs now on the market use a type of semiconductor memory referred to as flash memory.: True 73. Q13. The set of all the tracks in the same relative position on the platter is referred to asa .1 A. Floppy disk 74. Q14. What is the purpose of RAID system?: C. It increases the disk storage capacity and availability 75. Q15. Gaps that separate blocks on the tape: D. Inter-record gaps 76.Q16.A is a high-definition video disk that can store 25 Gbytes on a single layer on a single side. 5/5: D. Blu-ray DVD 77.Q17. A circular platter constructed of nonmagnetic material coated with a magnetizable material.: A. Magnetic Disk 78. Q18. External hard drives HDD is a .1C. Removable disk 96. Q16. The most common means of computer/user interaction is a .. A. keyboard/monitor 97. Q17. attributes include hardware details transparent to the programmer.: B. Organizational 98. Q18. An I/O device is referred to as a .C. Peripheral 99. Q19. A set of I/O modules is a key element of a computer system.: A. True 100. Q20. The disadvantage of the software poll is that it is time consuming.: A. True 101. Q1. Facilities and services provided by the OS that assist the programmer in creating programs are in the form of programs that are not actually part of the OS but are accessible through the OS.: a. utility 102. Q2. is when the processor spends most of its time swapping pages rather than executing instructions.: b. Thrashing 103.Q3.A is a collection of memory regions.: c. domain 104. Q4. is an I/O operation.: a. Swapping 105. Q5. A/An is a hardware-generated signal to the processor.: b. Interrupt 106. Q6. The OS maintains a for each process that shows the frame location for each page of the process.: b. page table 107.Q7.A is an actual location in main memory.: d. physical address 108. Q8.A is a special type of programming language used to provide instructions to the monitor.: a. job control language 109. Q9. The gives a program access to the hardware resources and services available in a system through the user instruction set architecture supplemented with high-level language library calls.: API 110. Q10. In Address Spaces of Pentium Memory Management, this memory is viewed as a paged linear address space. Protection and management of memory is done via paging. This is favored by some operating systems. So, what kind is the memory type?: b. Unsegmented paged memory 111.Q11. The is a program that controls the execution of applica- tion programs and acts as an interface between applications and the computer hardware.: b. operating system 112. Q12. Uniprogramming is the central theme of modern operating systems.- :b. False 113. Q13. Data that has been organized and logically related to allow access, retrieval, and use of that data is called a . b. database 114. Q14. Techniques that automatically move program and data blocks into the physical main memory when they are required for execution are called ..c. Virtual Memory techniques 115. Q15. How many bits of segment reference and offset contained in each virtual address?: b. 16-bit segment reference and 32-bit offset 116. Q16. The is a program that controls the execution of applica- tion programs and acts as an interface between applications and the computer hardware.: b. operating system 117.Q17. The defines the repertoire of machine language instruc- tions that a computer can follow.: d. ISA 118.Q18.A system works only one program at a time.: b. unipro- gramming 119. Q19. The scheduler determines which programs are admitted to the system for processing.: a. long-term 120. Q20. Privileged instructions are certain instructions that are designated special and can be executed only by the monitor.: a. True 121. Q2: The most common scheme in implementing the integer portion of the ALU is:: c. twos complement representation 122. Q3: representation is almost universally used as the proces- sor representation for integers.: twos compliment 123. Q4: Moving the sign bit to the new leftmost position and filling in with copies of the sign bit is called +1 a. sign extension 124. Q6: In representation the rule for forming the negation of an integer is to invert the sign bit.: d. sign-magnitude 125. Q7: is when the result may be larger than can be held in the word size being used.: a.Overflow 126. Q11. involves the generation of partial products, one for each digit in the multiplier, which are then summed to produce the final product.: c. Multiplication 127. Q14. Negative numbers less than -(2 - 24-23) x 2 128 are called - : d. negative overflow 128. Positive numbers less than 24-127 are called .1 a. positive under- flow 129. Q16: formats extend a supported basic format by providing additional bits in the exponent and in the significand.: c. Extended precision 130. Q17: are included in IEEE 754 to handle cases of exponent underflow.: a. Subnormal numbers 131.Q19:__.__is when a positive exponent exceeds the maximum possible exponent value.: c. Exponent overflow 132. Q1. The operand____ yields true if and only if both of its operands are true.: C. AND 152. 2. Let LDMIA r10, {r0, r1, r4} with value of r10 = 0x20C, r1 has value:: b. 0x210 153. 3. The byte consists of three fields: the Scale field, the Index field and the Base field.: a. SIB 154. 4. The was designed to provide a powerful and flexible instruc- tion set within the constraints of a 16-bit minicomputer.: c. PDP-11 155. 5. is a principle by which two variables are independent of each other.: b. Orthogonality 156. 6. Which of the following interrelated factors go into determining the use of the addressing bits?: d. all of the above 157. 7. The only form of addressing for branch instructions is addressing.: d. immediate 158. 8. For the mode, the operand is included in the instruction.: a. immediate 159. 9. Indexing performed after the indirection is .1 c. postindexing 160. 10. For , the address field references a main memory address and the referenced register contains a positive displacement from that ad- dress.: a. indexing 161.11. The advantage of is that no memory reference other than the instruction fetch is required to obtain the operand.: b. immediate addressing 162.12. The advantages of addressing are that only a small address field is needed in the instruction and no time-consuming memory references are required.: c. register 163. 13. has the advantage of large address space, however it has the disadvantage of multiple memory references.: a. Indirect addressing 164. 14. The principal advantage of addressing is that it is a very simple form of addressing.: d. direct 165. 15. has the advantage of flexibility, but the disadvantage of complexity.: b. Displacement addressing 166. 19. What is the value in the R2 register?: C. 00000002 167. 20. What is the value in the R3 register?: D. 00000004 168. Q1: determines the control and pipeline organization.: B. Exe- cution sequencing 169. Q2: The Patterson study examined the dynamic behavior of programs, independent of the underlying architecture. *: A. HLL 170. Q3: is the fastest available storage device.: C. Register storage 171. Q4: The first commercial RISC product was . D. the Pyramid 172. Q5: instructions are used to position quantities in registers temporarily for computational operations.: A. Load-and-store 173. Q6: Which stage is required for load and store operations?: D. all of the above 174.Q7:A instruction can be used to account for data and branch delays. *: B. NOOP 175. Q8: The instruction location immediately following the delayed branch is referred to as the : C. delay slot 176. Q9: The stage includes ALU operations, cache access, and register update.: B. execute 177. Q10: The MIPS R4000 uses bits for all internal and external data paths and for addresses, registers, and the ALU.: C. 64 178. Q11: All MIPS R series processor instructions are encoded in a single word format.: D. 32-bit 179. Q12:A architecture is one that makes use of more, and more fine-grained pipeline stages.: B. superpipelined 180. Q13: The R4000 can have as many as instructions in the pipeline at the same time.: A. 8 181. Q14: The R4000 pipeline stage where the instruction result is written back to the register file is the stage. 5/5: A. write back 182. Q15: SPARC refers to an architecture defined by .C. Sun Mi- crosystems 183. Q16: The contains a word of data to be written to memory or the word most recently read: C. MBR 184. Q17: The determines the opcode and the operand specifiers.: A. decode instruction 185.Q18:A hazard occurs when there is a conflict in the access of an operand location.: B. data 186.Q19: A is a small, very-high-speed memory maintained by the instruction fetch stage of the pipeline and containing the n most recently fetched instructions in sequence.: A. loop buffer 187. Q20: The is asmall cache memory associated with the instruc- tion fetch stage of the pipeline.: C. branch history table 
