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Computer Architecture and Organization

CHAPTER 1:

INTRODUCTION

Computer

Architecture and

Organization

Computer Architecture and Organization (^) 2 LEARNING OBJECTIVES

 Know the difference bin CA & CO

 Explain the general functions and structure of a

digital computer.

 Present an overview of the evolution of computer

technology

 Understand the key performance issues that relate

to computer design.

COMPUTER ORGANIZATION

 Organization refer to how features are implemented

and the operational units of the computer and their

interconnections that implement the feature

 Control signals,

 Interfaces between computer and peripherals

 The memory technology being used

 So, for example, the fact that a multiply instruction is

available is a computer architecture issue.

 How that multiply is implemented is a computer organization

issue.

Computer Architecture and Organization

Computer Architecture and Organization (^) 5 DIFFERENCE BETWEEN CA & CO

Computer Architecture Computer Organization

Higher level Lower level (microarchitecture)

Visible and very important for

programmer

Not so important for

programmers

Logical components

(Instruction set, Addressing

modes, Data types)

Physical components

(circuit design, signals,

peripherals, adders)

What to do? (instruction set) How to do? (implementation of

the architecture)

STRUCTURE & FUNCTION  (^) Structure is the way in which components relate to each other  (^) Function is the operation of individual components as part of the structure  (^) All computer functions are:

 Data processing

 Data storage

 Data movement

 Control

Computer Architecture and Organization

FUNCTIONAL VIEW Computer Architecture and Organization

STRUCTURE - TOP LEVEL Computer Architecture and Organization Computer Main Memory Input Output Systems Interconnection Peripherals Communication lines Central Processing Unit

Computer

STRUCTURE - THE CPU Computer Architecture and Organization Computer Arithmetic and Login Unit Control Unit Internal CPU Interconnection Registers CPU I/O Memory System Bus

CPU

Computer Architecture and Organization (^) 13 EVOLUTION OF A COMPUTER The First Generation: Vacuum Tubes

 Computers used vacuum tubes for digital logic elements and

memory.

 Stored-program concept (John von Neumann/ Alan Turing)

 The first publication of the idea was in a 1945 proposal by von

Neumann for a new computer, the EDVAC (Electronic Discrete

Variable Computer).

 IAS (1946-1952)

 a new stored-Program computer by von Neumann and his

colleagues

 at the Princeton I nstitute for A dvanced S tudies.

 With rare exceptions, all of today’s computers have this same

general structure and function

STRUCTURE OF VON NEUMANN MACHINE  (^) A main memory , which stores both data and instructions  (^) An arithmetic and logic unit (ALU)capable of operating on binary data  (^) A control unit , which interprets the instructions in memory and causes them to be executed  (^) Input/output (I/O) equipment operated by the control unit Computer Architecture and Organization

IAS MEMORY FORMAT

 Each number is represented by a sign bit and a 39-bit

value.

 A word may also contain two 20-bit instructions, with

each instruction consisting of 8-bit operation code

(opcode) and 12-bit address

Computer Architecture and Organization

IAS MAIN REGISTERS  (^) Memory buffer register (MBR): Contains a word to be stored in memory or sent to the I/O unit, or is used to receive a word from memory or from the I/O unit.  (^) Memory address register (MAR): Specifies the address in memory of the word to be written from or read into the MBR.  (^) Instruction register (IR): Contains the 8-bit opcode instruction being executed.  (^) Instruction buffer register (IBR): Employed to hold temporarily the right hand instruction from a word in memory.  (^) Program counter (PC): Contains the address of the next instruction pair to be fetched from memory.  (^) Accumulator (AC) and multiplier quotient (MQ): Employed to hold temporarily operands and results of ALU operations. For example, the result of multiplying two 40-bit numbers is an 80-bit number; the most significant 40 bits are stored in the AC and the least significant in the MQ. Computer Architecture and Organization

IAS OPERATION  (^) Operates by repetitively performing an Instruction cycle.  (^) Each instruction cycle consists of two subcycles. Instruction Fetch and Instruction Execute Cycle  (^) In fetch cycle the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR.  (^) This instruction may be taken from the IBR or from memory by loading a word into the MBR, and then down to the IBR, IR, and MAR.  (^) There is only one register that is used to specify the address in memory for a read or write and One register is used for the source or destination.  (^) Once the opcode is in the IR, the execute cycle is performed.  (^) Control circuitry interprets the opcode and executes the instruction. Computer Architecture and Organization

IAS INSTRUCTION SET The IAS computer had a total of 21 instructions, which can be grouped as follows:  (^) Data transfer: Move data between memory and ALU registers or between two ALU registers.  (^) Unconditional branch: Normally, the control unit executes instructions in sequence from memory. This sequence can be changed by a branch instruction, which facilitates repetitive operations.  (^) Conditional branch: The branch can be made dependent on a condition, thus allowing decision points.  (^) Arithmetic: Operations performed by the ALU.  (^) Address modify: Permits addresses to be computed in the ALU and then inserted into instructions stored in memory. This allows a program considerable addressing flexibility. Computer Architecture and Organization