RISC vs. CISC: Processor Design and Instruction Set Architectures, Lecture notes of Computer Architecture and Organization

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Chapter 2_Lecture 6

RISC Vs. CISC

Processor design

The time taken by a processor to complete

a program can be determined by three

factors:

• The number of instructions in the

program,

• The average number of clock cycles

required to execute an instruction, and

• The clock cycle time

Cont…

Examples

Intl:80x Motorola: 680x Sun: Sparc

Silicon Graphics: MIPS HP: PA-RISC IBM: PowerPC Compaq: Alpha

CISC Machines

RISC Machines

CISC-RISC hybrid

• Today, most CISC processors are based on hybrid

CISC-RISC architectures

• These designs use a decoder to convert CISC

instructions into RISC instructions before execution.

They are then processed by a RISC core, which

performs a few basic instructions very quickly

• Having a RISC core is advantageous because it

allows performance enhancing features, such as

pipelining and branch prediction

• Popular examples of hybrid designs include the

Pentium and Athlon family of processors. These

processors are compatible with software written for

their CISC predecessors yet perform competitively

against processors based on RISC designs