Computer Organization: CISC vs RISC, Lecture notes of Computer Fundamentals

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CS130AB Computer Organization

David Davidian, Lecturer

August 26, 2022 (updated) to ... who

knows

The American University of Armenia

Today’s Agenda

CISC/RISC, Harvard, Von Neuman Architectures, Instruction Set Architecture (ISA) No homework ... Yet  When you email me about anything, please tell me what class/course you are in. Don’t just write, for example “I am your student, I missed your class today, I was abducted by aliens -- do we have homework?” 

Ya, transistors, so what? So look…

What mathematical (logic) functions to each of these perform?

CISC v RISC

What is the basic difference? Complex Instruction Set Computing is a processor design where single instructions execute simple low-level operations. Reduced Instruction Set Computing is based on a set of optimized, yet reduced number of instructions, that perform operations similar to CISC. RISC instructions are not as versatile as those of CISC, but are uniform simplifying compiler design and pipelining (I will explain) When RISC was introduced, for the same clock, these processors were ~30% faster than CISC counterparts. F D E W B Fetch Decode Execute Write Back

Ex: Multiplying Two Numbers

On the right is a diagram representing the storage scheme for a generic computer. The execution unit is responsible for carrying out all computations. However, the execution unit can only operate on data that has been loaded into one of the six registers (A, B,

Ex: Multiplying Two Numbers

Let's say we want to find the product of two numbers - one stored in location 6 and another stored in location 10 and then store the product back in the location 6

MULT: The RISC Way

The programmer would need to write one line of assembly: MULT [6], [10], [6] Note this will not be, for example, accomplished 3X faster than the equivalent CISC operation, since hardware functions still have to be performed. Advantage is a single instruction fetch and decode.

Harvard Architecture

The name Harvard Architecture comes from the Harvard Mark I relay- based computer. The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data.

Microcontrollers

Embedded Systems Operations managed behind the scenes by a microcontroller Microcontroller (MCU) Integrated electronic computing device that includes three major components on a single chip

• (^) Microprocessor (MPU)
• (^) Memory
• (^) Parallel and serial I/O ports
• (^) Timers
• (^) A/D converters
• (^) Common communications lines

A Microcontroller-based System

Evolution of Coding

Machine Language

• (^) Binary format 11100101100111110001000000010000 11100101100111110000000000001000 11100000100000010101000000000000 11100101100011110101000000001000
• (^) Hexadecimal format E59F E59F E E58F

Evolution of Programming

Assembly Language

• (^) Mnemonic codes E59F1010 LDR R1, num E59F0008 LDR R0, num E0815000 ADD R5, R1, R E58F5008 STR R5, sum High-Level Language
• (^) C language sum = num1 + num2;

From Source to Execution