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These are the key points discussed in the given Slides : Computer Interfaces, Interfaces, Parallel Port, Asynchronous, Parallel, Interface, Data Acquisition, National Instruments, Automated Measurement, Control
Typology: Slides
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0100
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0101
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Parallel: Fast and expensive–
devices A, B simple, but cablingharder– strobe alerts to “data valid” state
Device A
bit 0bit 1bit 2bit 3bit 4bit 5bit 6bit 7
Device B
strobe
Serial: Slow and cheap–
but devices A and mustconvert between serial/parallel
Device A
Device B
data
slide courtesy E. Michelsen
data valid
data held static for some interval
see http://www.beyondlogic.org/index.html#PARALLEL
Most PCs have a DB-25 femaleconnector for the parallel port
-^
Usually at memory address 0x
-^
Windows 98 and before were easyto talk to–
but after this, a hardware-abstraction layer (HAL) whichmakes access more difficult– one option is to fool computer intothinking you’re talking to a normalLPT (printer) device– involves tying pins 11 and 12 toground
-^
Straightforward on Linux–
direct access to all pins
serial port
parallel port
If we agree on 4 asynchronous communication parameters:–
Data rate: Speed at which bits are sent, in bits per seconds (bps)– Number of data bits: data bits in each byte; usually 8
-^
old stuff often used 7
-^
Parity: An error detecting method: None, Even, Odd, Mark, Space
-^
Stop bits: number of stop bits on each byte; usually 1.
-^
Rarely 2 or (more rarely) 1.5: just a minimum wait time: can be indefinite start
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
parity
stop 1
idle
idle
start
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
stop
idle
idle
ASCII “A” = 0x
1 bit @ 9600 bps = 1/
th^
sec
stop 2
slide courtesy E. Michelsen
RS-232 is an electrical (physical) specification forcommunication–
idle, or “mark” state is logic 1;
-^
5 to
15 V (usually about
12 V) on transmit
-^
3 to
25 V on receive
“space” state is logic 0;
-^
+5 to +15 V (usually ~12 V) on transmit
-^
+3 to +25 V on receive
-^
the dead zone is from
3 V to +3 V (indeterminate state)
Usually used in asynchronous mode–
so idles at
12; start jumps to +12; stop bit at
since each packet is framed by start/stop bits, you are guaranteeda transition at start
-^
parity (if used) works as follows:
-^
even parity guarantees an even number of ones in the train
-^
odd parity guarantees an odd number of ones in the train
switches) determines who’s who
detectors, measuring or setting voltages/currents, etc.
A PCI-card for data acquisition is avery handy thing
-^
The one pictured at right (NationalInstruments PCI-6031E) has:–
64 analog inputs, 16 bit– 2 DACs, 16 bit analog outputs– 8 digital input/output– 100,000 samples per second– on-board timers, counters
-^
Breakout box/board recommended
CAMAC crate (above) and inhabitants(right) including two custom modules,two commercial time-to-digital converters(TDCs) and the crate controller (noteinterface cable (50-pin SCSI-2 style)