Computer - Machine Organization - Lecture Slides, Slides of Electric Machines

Some concept of Machine Organization are Anatomy, Cache Access Time, Instruction Formats, Instruction Formats, Instruction Formats, Multidimensional Meshes, Network Processors, Snooping Protocol. Main points of this lecture are: Computer, Memory Map, Instruction Set Architecture, Machine Instructions, Address Modes, Instructions, Operate, Data Move, Control, Programming in Machine Code

Typology: Slides

2012/2013

Uploaded on 04/30/2013

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Chapter 5
The LC-3
LC-3 Computer
Architecture
Memory Map
Instruction Set Architecture (ISA)
Machine Instructions
Address Modes
Instructions
- Operate
- Data Move
- Control
Programming in Machine Code
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Chapter 5

The LC-

LC-3 Computer

  • Architecture
  • Memory Map
  • Instruction Set Architecture (ISA)
    • Machine Instructions
    • Address Modes
    • Instructions - Operate - Data Move - Control
  • Programming in Machine Code Docsity.com

The LC-3 Computer

a von Neumann machine

Memory

PSW (Program Status Word): Bits: 15 10 9 8 2 1 0 | S| |Priority| | N| Z| P|

PSW

Fetch: Next Instruction from Memory (PC)  (points to) next instruction PC (PC) + 1 Decode: Fetched Instruction Evaluate: Instr & Address (es) (find where the data is) Load: Operand (s) (get data as specified) Execute: Operation Store: Result (if specified)

The Instruction Cycle:

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LC-3 Memory Map

(64K of 1 6 bit words ) 256 words (We will get to theses today) 256 words (We will get to these later)

23.5 K words

39.5 K words

512 words

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LC-3 Instructions (Fig 5.3 & Appendix a)

Addressing Modes

  • Register (Operand is in one of the 8 registers)
  • PC-relative (Operand is “offset” from where the PC points - offsets are sign extended to 16 bits)
  • Base + Offset (Base relative) (Operand is “offset” from the contents of a register)
  • Immediate

(Operand isin the instruction)

  • Indirect

(The “Operand”points to the real address of Operand

  • rather than being the operand)

Note: The LC-3 has No Direct Addressing Mode Docsity.com

LC-3 Instructions (Fig 5.3 & Appendix a)

Addressing Modes

  • Register (Operand is in one of the 8 registers)
  • PC-relative (Operand is “offset” from where the PC points - offsets are sign extended to 16 bits)
  • Base + Offset (Base relative) (Operand is “offset” from the contents of a register)
  • Immediate

(Operand isin the instruction)

  • Indirect

(The “Operand”points to the real address of Operand

  • rather than being the operand)

Note: The LC-3 has No Direct Addressing Mode Docsity.com

Data Movement Instructions

  • Load - read data from memory to a register
    • LD: PC-relative mode [0010 DR PCoffset9]
    • LDI: Indirect mode [1010 DR PCoffset9]
    • LDR: Base+offset mode [0110 DR BaseR offset6]
  • Store - write data from a register to memory
    • ST: PC-relative mode [0011 DR PCoffset9]
    • STI: Indirect mode [1011 DR PCoffset9]
    • STR: Base+offset mode [0111 DR BaseR offset6]
  • Load effective address – address saved in register
    • LEA: PC-relative mode [1110 DR PCoffset9]

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Control Instructions

  • Go to New Location in Program – “GO TO”
    • BR: PC-relative mode [0000 NZP PCoffset9]
    • JMP: Indirect mode [1100 000 BaseR 000000]
  • Trap Service Routine Call
    • TRAP: Indirect [1111 0000 TrapVec8]
  • Jump to Subroutine (will be covered later)
    • JSR: PC-relative mode [0100 1 PCoffset11]
    • JSRR: Indirect mode [0100 000 BaseR 000000]
  • Return from Trap/Subroutine
    • RET: No operand [1100 000 111 000000]
  • Return from Interrupt (will be covered later)
    • RTI: No operand [1000 000000000000] Docsity.com

LC-3 Instructions (Fig 5.3 & Appendix a)

Addressing Modes

  • Register (Operand is in one of the 8 registers)
  • PC-relative (Operand is “offset” from where the PC points - offsets are sign extended to 16 bits)
  • Base + Offset (Base relative) (Operand is “offset” from the contents of a register)
  • Immediate

(Operand isin the instruction)

  • Indirect

(The “Operand”points to the real address of Operand

  • rather than being the operand)

Note: The LC-3 has No Direct Addressing Mode Docsity.com

BR

SEXT

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Jump Instruction

JMP BaseR [1100 000 BaseR 000000]

  • Jump is an unconditional branch -- always taken.
  • BaseR
    • New PC contents (an Address) is the contents of the Base register
    • Allows any target address!

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Compute the Sum of 12 Integers Program

  • Program begins at location x3000.
  • Integers begin at location x3100.

R1 ← x R3 ← 0 (Sum) R2 ← 12(count)

R2=0?
R4 ← M[R1]
R3 ← R3+R
R1 ← R1+
R2 ← R2-

NO

YES

R1: “Array” index pointer (Begin with location 3100) R3: Accumulator for the sum of integers R2: Loop counter (Count down from 12) R4: Temporary register to store next integer Docsity.com

Sum integers from x3100 – x310B

Address Instruction Comments

x3000 1 1 1 0 0 0 1 0 1 1 1 1 1 1 1 1 R1 ← x31 00

x3001 0 1 0 1 0 1 1 0 1 1 1 0 0 0 0 0 R3 ← 0

x3002 0 1 0 1 0 1 0 0 1 0 1 0 0 0 0 0 R2 ← 0

x3003 0 0 0 1 0 1 0 0 1 0 1 0 1 1 0 0 R2 ← 1 2

x3004 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 If Z, goto x300A

x3005 0 1 1 0 1 0 0 0 0 1 0 0 0 0 0 0 Load next value to R

x3006 0 0 0 1 0 1 1 0 1 1 0 0 0 1 0 0 Add to R

x3007 0 0 0 1 0 0 1 0 0 1 1 0 0 0 0 1 Increment R1 (pointer)

X3008 0 0 0 1 0 1 0 0 1 0 1 1 1 1 1 1 Decrement R2 (counter)

x3009 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 Goto x

R1: “Array” index pointer (Begin with location 3100) R3: Accumulator for the sum of integers R2: Loop counter (Count down from 12) R4: Temporary register to store next integer

What happens at location 300A? Docsity.com

The Sum program in “binary”

x3000 1110001011111111 ;R1=x

x3001 0101011011100000 ;R3=

x3002 0101010010100000 ;R2=

x3003 0001010010101100 ;R2=R2+

x3004 0000010000000101 ;If z goto x300A

x3005 0110100001000000 ;Load next value into R

x3006 0001011011000100 ;R3=R3+R

x3007 0001001001100001 ;R1=R1+

x3008 0001010010111111 ;R2=R2-

x3009 0000111111111010 ;goto x

x300A 1111000000100101 ;halt

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The Sum program in “hex”

x3000 E2FF ;R1=x

x3001 56E0 ;R3=

x3002 54A0 ;R2=

x3003 14AC ;R2=R2+

x3004 0405 ;If z goto x300A

x3005 6840 ;Load next value into R

x3006 16C4 ;R3=R3+R

x3007 1261 ;R1=R1+

x3008 14BF ;R2=R2-

x3009 0FFA ;goto x

x300A F025 ;halt

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