Interrupts - Machine Organization - Lecture Slides, Slides of Electric Machines

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Interrupts

Chapter 8 – pp 209-

Chapter 10 – pp 258-

Appendix A – pp 537 & 543-

Interrupts & Exceptions

Interrupts:

• Asynchronous external requests for service (think device, like keyboard or printer, needs service).
• Being asynchronous, Interrupts can occur anyplace in your program!
• They are a normal event , and shouldn’t interfere with the normal running of your program.

Exceptions:

• “Synchronous” internal requests for service based upon abnormal events (think illegal instruction, illegal address, overflow, hardware malfunction, or …).
• Being synchronous, Exceptions occur when there is abnormal event in your program (like divide by zero, or illegal memory location)!
• They are abnormal events and often result in the termination of a program, or the execution of a “recovery” before continuing.

LC-3 Interrupt/Exception Vector Table: ( 256 Address Vectors )

• x0100 – 017F: Used for addresses for Exception service routines. Vector # is provided by the CPU.
• x0180 – 01FF: Used for addresses for Interrupt service routines. Vector # is provided by a Device.

Program Context Implications

• What are the Program Context implications of:

– Executing a Trap Routine?

– Executing a Subroutine (or Function, or Method)?

– Executing an Interrupt?

Program Context Implications What are the Program Context implications of:

• Executing a Trap Routine?
  • The PC must be saved and restored (Done by TRAP & RET)

(Registers must be restored by Trap Routine -

It is assumed all other “state” values effectively remain unchanged)

• Executing a Subroutine (or Function, or Method)?
  • The PC must be saved and restored (Done by JSR or JSRR, & RET)

(Registers must be restored by Trap Routine -

It is assumed all other “state” values effectively remain unchanged)

• Executing an Interrupt?
  • The PC, SP, & PSW must be saved and restored (Done by Supervisor &

RTI)

(Registers must be restored by Interrupt Service Routine -

It is assumed all other “state” values effectively remain unchanged)

Interrupt Components

Device (Keyboard shown here as example) Memory

Keyboard Status Register: Keyboard Data Register: Keyboard Priority: 0 to 7 Device Interrupt Vector #: 1 80 to 1FF (Note: device actually sends 00-FF to CPU)

CPU

PC (Program Counter) R6 (Stack Pointer) PSR (Program Status Word) Bits: 15 10 9 8 2 1 0 | S | | Priority | | N| Z| P | USP.saved (User Stack Pointer Storage) SSP.saved (Supervisor Stack Pointer Storage)

Interrupt Example Intr Vectors Program flow Supervisor Stack

Interrupt Driven Keyboard Service Routine

Program:

• Program consists of a main program and a keyboard service routine.
• Program will Print “Input an Endless Character String “ and loop forever.
• Program Organization: main program: “Create Stack” Load address of your service routine into the Interrupt Vector (address x0180) Print a prompt message Set up the Keyboard to be able to Interrupt (set Status Register bit 14) Loop service routine: Read keyboard data register (resets the ready bit (bit 15)) Echo the char to the Monitor (using polling) Execute an RTI instruction at the end of the routine

• LC-3 Interrupt Structure - Figure C.