Control Unit, CPU instructions, pipelining, memory hierarchy, cache, and virtual memory., Study notes of Computer Architecture and Organization

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Unit-

Control Unit

INSTRUCTION- Instruction is a command to the processor to perform a given task on specified data. A computer instruction refers to a binary code that controls how a computer performs micro-operations in a series. They are saved in the memory. Every computer has its own set of instructions. INSTRUCTION FORMATS- An instruction format or instruction code is a group of bits used to perform a particular operation on the data stored in computer. • Processor fetches an instruction from memory and decodes the bits to execute the instruction. • Different computers may have their own instruction set.

• Suppose in a 16 bit instruction, First 12 bits (0-11) specify an address.
• Next 3 bits specify operation cod (opcode).
• Left most bit specify the addressing model I = 0 for direct address I = 1 for indirect address.

• Lecture-
• Lecture-

ONE-ADDRESS INSTRUCTIONS- One-address instructions use an implied accumulator (AC) register for all data manipulation. For multiplication and division there is a need for a second register. However, here we will neglect the second and assume that the AC contains the result of all operations. The program to evaluate X = (A + B) (C + D) is- LOAD A AC ← M [A] ADD B AC ← A C + M [B] STORE T M [T] ← AC LOAD C AC ← M [C] ADD D AC ← AC + M [D] MUL T AC ← AC M [T] STORE X M [X] ← AC All operations are done between the AC register and a memory operand. T is the address of a temporary memory location required for storing the intermediate result. ZERO-ADDRESS INSTRUCTIONS- A stack-organized computer does not use an address field for the instructions ADD and MUL. The PUSH and POP instructions need an address field to specify the operand that communicates with the stack. The following program shows how X = (A + B) (C + D) will be written for a stack organized computer. PUSH A TOS ← A PUSH B TOS ← B ADD TOS ← (A + B) PUSH C TOS ← C PUSH D TOS ← D ADD TOS ← (C + D) MUL TOS ← (C + D) (A +B) POP X M [X] ← TOS To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression into Reverse Polish Notation RPN. The name “zero-address” is given to this type of computer because of the absence of an address field in the computational instructions.

INSTRUCTION CYCLE:-

1. A program residing in the memory unit of the computer consists of a sequence of instructions.
2. The program is executed in the computer is going through a cycle for each instruction.
3. Each instruction cycle is subdivided into a sequence of sub cycles or phases. From fetching of instruction to the completion of execution of instruction whatever happens is called instruction cycle.
4. The instruction cycle (also known as the fetch–decode–execute cycle, or simply the fetch-execute cycle) is the cycle that the central processing unit (CPU) follows from boot-up until the computer has shut down in order to process instructions.
5. The reason we called this cycle because it will happen for every instruction. Each instruction cycle consists of the following phases:

• Fetch an instruction from memory.
• Decode the instruction.
• Read the effective address from memory if the instruction has an indirect address.
• Execute the instruction.

1. Reduced Instruction Set Computer (RISC)
2. Complex Instruction Set Computer (CISC) (Advantages and Characteristics)
3. Differences between RISC and CISC

Lecture-

Reduced Instruction Set Computer (RISC)-

• Computers that use fewer instructions with simple constructs so they can be executed much faster within the CPU without having to use memory as often are classified as RISC.
• Relatively few instructions and few addressing modes.
• Memory access limited to LOAD and STORE instructions as all operations done within the registers of the CPU.
• Fixed-length, easily decoded instruction format, single-cycle instruction execution.
• Hardwired rather than microprogrammed control.
• The small set of instructions of a typical RISC processor consists mostly of register-to-register operations, Thus, each operand is brought into a processor register with a LOAD instruction. All computations are done among the data stored in processor registers. Results are transferred to memory by means of store instructions.
• RISC is the most efficient CPU architecture technology. This architecture is an evolution and alternative to complex instruction set computing (CISC).
• The main idea behind this is to simplify hardware by using an instruction set composed of a few basic steps for loading and storing operations just like a load command will load data, a store command will store the data.

Complex Instruction Set Computer (CISC)- The main idea is that a single instruction will do all loading, evaluating, and storing operations just like a multiplication command will do stuff like loading data, evaluating, and storing it, hence it’s complex. Characteristics of CISC-

• Complex instruction, hence complex instruction decoding.
• Variable sized instructions set.
• Instructions are larger than one-word size.
• Instruction may take more than a single clock cycle to get executed.
• Less number of general-purpose registers as operations get performed in memory itself.
• Complex Addressing Modes. Advantages of CISC-
• Reduced code size: CISC processors use complex instructions that can perform multiple operations, reducing the amount of code needed to perform a task.
• More memory efficient: Because CISC instructions are more complex, they require more instructions to perform complex tasks, which can result in more memory-efficient code.
• Widely used: CISC processors have been in use for a longer time than RISC processors, so they have a larger user base and more available software. Disadvantages of CISC-
• Slower execution: CISC processors take longer to execute instructions because they have more complex instructions and need more time to decode them.
• More complex design: CISC processors have more complex instruction sets, which makes them more difficult to design and manufacture.
• Higher power consumption: CISC processors consume more power than RISC processors because of their more complex instruction sets.

Differences Between RISC Vs CISC-

Hardwired v/s Micro-programmed Control Unit- To execute an instruction, the control unit of the CPU must generate the required control signal in the proper sequence. There are two approaches used for generating the control signals in proper sequence as “Hardwired Control unit” and “Micro-programmed control unit.” Hardwired Control Unit –The control hardware can be viewed as a state machine that changes from one state to another in every clock cycle, depending on the contents of the instruction register, the condition codes and the external inputs.  The outputs of the state machine are the control signals.  The sequence of the operation carried out by this machine is determined by the wiring of the logic elements and hence named as “hardwired”.  Fixed logic circuits that correspond directly to the Boolean expressions are used to generate the control signals.  Hardwired control is faster than micro-programmed control.  A controller that uses this approach can operate at high speed. Characteristics:-

1. It uses flags, decoder, logic gates and other digital circuits.
2. As name implies it is a hardware control unit.
3. On the basis of input signal, output is generated.
4. Difficult to design, test and implement.
5. Hard to modify.
6. Faster mode of operation.
7. Expensive and high error.
8. Used in RISC processor.

Micro-programmed Control Unit –

1. The control signals associated with operations are stored in special memory units inaccessible by the programmer as Control Words.
2. Control signals are generated by a program and are similar to machine language programs.
3. Micro-programmed control unit is slower in speed because of the time it takes to fetch micro instructions from the control memory Characteristics-
4. It uses sequence of micro-instructions in micro programming language.
5. It generates a set of control signals on the basis of control line.
6. Easy to design, test and implement. It is mid-way between Hardware and Software.
7. Flexible to modify.
8. Slower mode of operation.
9. Cheaper and less error.
10. Used in CISC processor