Solutions for EECS 145M Midterm 2 - April 1999, Exams of Microcomputers

The solutions for midterm 2 of the eecs 145m course at the university of michigan - ann arbor, spring 1999. It covers the essential steps for connecting and using a d/a and a/d converter, measuring transition voltages, and analyzing filter coefficients using an fft. It also includes information about filter gains, frequencies, and harmonics.

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April 19, 1999 page 1 S. Derenzo
Solutions for Midterm #2 - EECS 145M Spring 1999
1a The following are essential:
Connect all 16 lines of one parallel output port to the input of the D/A converter
Connect the analog output of the D/A to the analog input of the A/D
Connect 12 lines of the output of the A/D to the parallel input port
Connect 1 line of the other parallel output port to the A/D start conversion input
Connect the data ready output of the A/D to one of the unused lines of the parallel input port.
Start A/D conversion under computer program control
Use the “Data ready” A/D output to signal the program that new data are available
Start Conversion
Parallel
Output
Port 1
Parallel
Input
Port
D/A
Converter
A/D
Converter
16
12
µ-
computer
Data Ready
Analog
data Ready for input data
A/D output data
D/A input data
Parallel
Output
Port 2
1b
1Set “Ready for input data” low, which makes “Data Ready” low
2Start loop over all values of n from 0 to 216 – 1
3Write n to the D/A converter
4Write a low, then a high to “Ready for input data” to start A/D conversion
5Read “Data ready” in a loop until it goes high
6When the A/D converter finishes, it strobes the data onto the input port and sets the “Data
Ready” line high
7The program detects this and reads the input port
8The program sets “Ready for input data” low, which causes the A/D converter to set “Data
Ready” low
9If the A/D output has changed from the last value read (say from m–1 to m), store the value of
n, which corresponds to the Vm–1, m transition voltage.
10 Loop back to step 2
11 Tabulate the difference between the measured transition voltages Vm–1, m and the ideal
transition voltages V(m–1,m) = (m–0.5)(4.095V/4095) = 0.001 V (m–0.5). The maximum
value is the maximum absolute accuracy error.
Essential steps: (1) vary all 16 D/A bits; (2) read A/D only after Data Ready has gone high; (3)
tabulate D/A input where A/D output changes; (4) compare transition voltages with ideal
[3 points off if only 12 D/A bits are varied. The transition voltages (or the center of the steps)
cannot be determined accurately unless more than 12 bits of the accuracy of the 16-bit D/A is
used.]
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Solutions for Midterm #2 - EECS 145M Spring 1999

1a The following are essential:

  • Connect all 16 lines of one parallel output port to the input of the D/A converter
  • Connect the analog output of the D/A to the analog input of the A/D
  • Connect 12 lines of the output of the A/D to the parallel input port
  • Connect 1 line of the other parallel output port to the A/D start conversion input
  • Connect the data ready output of the A/D to one of the unused lines of the parallel input port.
  • Start A/D conversion under computer program control
  • Use the “Data ready” A/D output to signal the program that new data are available

Start Conversion

Parallel Output Port 1

Parallel Input Port

D/A Converter

A/D Converter

16

12

μ- computer

Data Ready

Analog data (^) Ready for input data

A/D output data

D/A input data

Parallel Output Port 2

1b 1 Set “Ready for input data” low, which makes “Data Ready” low 2 Start loop over all values of n from 0 to 2^16 – 1 3 Write n to the D/A converter 4 Write a low, then a high to “Ready for input data” to start A/D conversion 5 Read “Data ready” in a loop until it goes high 6 When the A/D converter finishes, it strobes the data onto the input port and sets the “Data Ready” line high 7 The program detects this and reads the input port 8 The program sets “Ready for input data” low, which causes the A/D converter to set “Data Ready” low 9 If the A/D output has changed from the last value read (say from m–1 to m), store the value of n, which corresponds to the Vm–1, m transition voltage. 10 Loop back to step 2 11 Tabulate the difference between the measured transition voltages Vm–1, m and the ideal transition voltages V(m–1,m) = (m–0.5)(4.095V/4095) = 0.001 V (m–0.5). The maximum value is the maximum absolute accuracy error.

Essential steps: (1) vary all 16 D/A bits; (2) read A/D only after Data Ready has gone high; (3) tabulate D/A input where A/D output changes; (4) compare transition voltages with ideal

[3 points off if only 12 D/A bits are varied. The transition voltages (or the center of the steps) cannot be determined accurately unless more than 12 bits of the accuracy of the 16-bit D/A is used.]

[4 points off if the method is not automatic] [3 points off if the transition voltages are not measured] [3 points off if handshaking steps not indicated]

1c As part 1b above, but compare the measured transition voltages Vm–1, m (as a function of m) with the straight line passing between the first measured transition voltage V 0 , 1 and the last measured transition voltage V4094, 4095. The largest deviation is the maximum linearity error. [3 points off if the straight line is defined in terms of Vref–^ and Vref+^ (which is required for the absolute accuracy error). The maximum linearity error requires a straight line that passed through the measured end points]

1d As part 1b above, but compare the A/D step sizes Vm, m–1 – Vm–1, m with their average value. The largest deviation is the maximum differential linearity error. Alternatively, the A/D step sizes could be determined as the number of successive D/A inputs that produce the same A/D output. Note: It was essential to use the concept of a “table of transition voltages” to answer parts b and c of this problem.

1e Since the D/A has an absolute accuracy of ±1LSB, and its step size is 16 times finer than the average step size of the A/D, this design can measure the A/D transition voltages to an accuracy of ±1/16 of the A/D LSB. Therefore, the accuracy is ±1/32 A/D LSB for the maximum absolute and linear errors and ±1.414/32 A/D LSB for the maximum differential linearity error (difference between two random errors). Note: Due to a typo on the 1997 midterm #2 solutions, ±1 was also accepted

2a Filter gain >0.99 for frequencies <78,400 Hz

[1 point off for giving a single frequency rather than a range]

2b Filter gain <0.01 for frequencies >177,800 Hz

[1 point off for giving a single frequency rather than a range]

2c S = M ∆t = M/fs = 2^16 /2^18 Hz = 0.25 s

2d H 0 corresponds to 0 Hz (d.c.); H 1 corresponds to 1/S = 4 Hz

2e The FFT produces coefficients Hn, where n = 0 to M–1. Therefore, the coefficient with the highest index is HM-1 or H65,535, which corresponds to 4 Hz. [2 points off for HM and 0 Hz] [3 points off for HM and 2^18 Hz]

2f The FFT coefficient that corresponds to the highest frequency is HM/2 or H32,768. The corresponding frequency is (M/2)/S = 131,072 Hz

2g For a 4,000 Hz sinewave, the primary FFT coefficients are H 1000 and HM-1000. Additional neighboring coefficients H 999 , H 1001 , HM-999 , and HM-1001 are non-zero (actually half the value of the primary coefficients) due to the side lobes produced by the Hanning window. [1 point off for omitting side lobes] [4 points off for omitting harmonics]

2h For a 4,000 Hz symmetric square wave, a sequence of harmonics will appear at odd multiples of the 4,000 Hz fundamental. So Hk1000 and HM-k1000 would be non-zero, and the Hanning side lobes would be at Hk1000-1, Hk1000+1, HM-k1000-1, and HM-k1000+1. [1 point off for omitting side lobes] [4 points off for omitting harmonics]