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Solutions for midterm #1 of the eecs 145m spring 2003 course. It includes details on transparent latches, tri-state buffers, and instructions for designing an experiment to measure reaction times. The document also includes a section on using a/d converters and tri-state buffers.
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1a The transparent latch has a digital input, and digital output, and a digital control input that puts the circuit into transparent mode or hold mode. In transparent mode the output is equal to the input. When the circuit is switched to hold mode the output is held at its current value. [5 points off if no hold mode] 1b The tri-state buffer has a digital input, and digital output, and a digital control input that puts the circuit into transparent mode or tri-state mode. In transparent mode the output is equal to the input. In tri-state mode the output is in a high-impedance state that neither drives nor loads anything connected to it. [5 points off if no high impedance mode]
2 See Figures 3.16 and 3.17 on page 169 of the textbook [2 points off for using an amplifier rather than a comparator] [2 points off for not starting with all bits zero] [5 points off for describing the tracking A/D converter]
3
t d p d p
d p^ d^ m^ d^ p^ mp
s (^) D s 2 s 2 s (^2) / s^2 /
4a
A/D #
A/D #
Tri-state #
Tri-state #
12
12
12
16-bit parallel input
Start conversion
Data available 1
parallel output
Select #
Select #
Data available 2
Analog input 1
Analog input 2
[5 points off for not using tri-state buffers for selectively connecting the A/D outputs to the parallel input port] 4b 1 Read the system timer to get the current tick count n in ms and set data storage index i = 0. 2 Write word to parallel output port that has start conversion LOW, select1 LOW, and select LOW (assume that select = LOW is tri-state) 3 Write word to parallel output port that has start conversion HIGH, select1 LOW, and select2 LOW. This causes both A/Ds to convert simultaneously] 4 Read parallel input port in a loop until data available 1 goes HIGH 5 Write word to parallel output port that has start conversion HIGH, select1 HIGH, and select2 LOW 6 Read the parallel port, mask off handshaking bits, and store as data1(i). 7 Read parallel input port in a loop until data available 2 goes HIGH 8 Write word to parallel output port that has start conversion HIGH, select1 LOW, and select2 HIGH 9 Read the parallel port, mask off handshaking bits, and store as data2(i). 10 Set i = i + 1 and read the system timer until the tick counter reads n + 1000 i 11 loop back to step 3 [3 points off for reading the tri-state outputs before they are enabled] [3 points off for not reading the A/Ds sequentially] [3 points off for not starting both A/D converters simultaneously] [3 points off for not sampling the two waveforms once per second]