Convolutional Codes Continued-Digital Communication Systems-Lecture Slides, Slides of Digital Communication Systems

Dr. Shurjeel Wyne delivered this lecture at COMSATS Institute of Information Technology, Attock for Digital Communication Systems course. In this he discussed: Encoder, Convolutional, Codes, Channel, Encoder, Shift, Register, Effective, Rate, Vector, Representation

Typology: Slides

2011/2012

Uploaded on 07/05/2012

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Digital Communication
Systems
Dr. Shurjeel Wyne
Lecture 15
CH 7 Convolutional Codes
2
Last time, we talked about:
Channel coding
Linear block codes
The error detection and correction capability
Encoding and decoding
Hamming codes
Cyclic codes
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pf4
pf5
pf8
pf9
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Download Convolutional Codes Continued-Digital Communication Systems-Lecture Slides and more Slides Digital Communication Systems in PDF only on Docsity!

1

Digital Communication

Systems

Dr. Shurjeel Wyne

Lecture 15

CH 7 Convolutional Codes

2

Last time, we talked about:

 Channel coding

 Linear block codes

 The error detection and correction capability

 Encoding and decoding

 Hamming codes

 Cyclic codes

3

Today, we are going to talk about:

 Another class of linear codes, known as Convolutional codes.

 We study the structure of the encoder.

 We study different ways for representing the encoder.

4

Convolutional Codes

 In convolutional coding, the channel encoder maps a continuous sequence of information bits into a continuous sequence of encoded output bits  Convolutional coding differs from block coding in that information bits are not grouped into distinct blocks for encoding, rather the entire data stream can be encoded into a single codeword  Convolutional codes can achieve a larger coding gain as compared to block codes with the same complexity  The convolutional encoder requires memory elements, a code is generated by passing the information bit sequence through a finite state shift register

 The shift register contains k K-bit stages and n

modulo-2 adders

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Convolutional codes-cont’d

 A Convolutional code is specified by three

parameters or where

 is the coding rate, which determines the number of data bits per coded bit.  In practice, usually k=1 is chosen and we will assume k=1 in this course (unless stated otherwise).

K is the constraint length of the encoder, where the encoder has ( K-1)k memory elements. The constraint length represents the number of k -bit shifts over which a single information bit can influence the encoder output.

 For the k=1 case that we will assume in this course, this means that the encoder has (K-1) memory elements and each information bit will influence encoder output over K single- bit shifts.

( n , k , K ) ( k / n , K )

k / n

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Block diagram of the DCS

Information source

Rate 1/n Conv. encoder Modulator

Information sink

Rate 1/n Conv. decoder Demodulator m ˆ^ ( m ˆ 1 , m ˆ 2 ,..., m ˆ i ,...)

(^1) Input (^2) sequence Channel m ( m , m ,..., mi ,...)

Branch word( coded bits)

1

Codeword sequence

( 1 , 2 , 3 ,..., ,...)

n

i i ji ni

i

U u ,...,u ,...,u

U U U U

U ^ G(m)

outputsperBranch wor d

1 forDemodulato Branch worroutputsd

receivedsequence

( 1 , 2 , 3 ,..., ,...)

n

i ji ni i

i

Zi z,...,z ,...,z

Z Z Z Z

Z

i = time index

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Rate ½ Convolutional encoder

 Convolutional encoder (rate ½, K=3)

Input data bits Output coded bits m

u 1

u 2

First coded bit

Second coded bit

u 1 , u 2

(Branch word)

 3 shift-registers where the first one takes the incoming data bit and the rest, form the memory of the encoder.

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Rate ½ Convolutional encoder –

Cont’d

t 1 1 0 0

u 1

u 2

11

u 1 u (^2) t 2 0 1 0

u 1

u 2

10

u 1 u 2

t 3 1 0 1

u 1

u 2

00

u 1 u (^2) t 4 0 1 0

u 1

u 2

10

u 1 u 2

m ( 101 ) Time (^) Output Time Output

Message sequence:

(Branch word) (Branch word)

msg bits are input at times t1, t2, t

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Encoder representation

 Vector representation:  We define n binary K-vectors (one vector for each modulo- 2 adder). The i :th element in each vector, is “1” if the i :th stage in the shift register is connected to the corresponding modulo-2 adder, and “0” otherwise.  Example:

m

u 1

u 2 ( 101 ) u^1 u^2

( 111 ) 2

1 

g

g

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Encoder representation – cont’d

 Polynomial representation:  We define n generator polynomials, one for each modulo- adder. Each polynomial is of degree K-1 or less and its coefficients are either 0 or 1 depending on whether or not the shift register is connected to the corresponding modulo-2 adder.  Example:

The output sequence is found as follows:

( 2 ) 2 2 2

( 2 ) 1

( 2 ) 2 0

( 1 ) 2 2 2

( 1 ) 1

( 1 ) 1 0 ( ).. 1

X g g X g X X

X g g X g X X X     

g

g

U ( X ) m ( X ) g 1 ( X )interlacedwith m ( X ) g 2 ( X )

( 101 )

( 111 ) 2

1 

g

g

Equivalent Vector representation

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Encoder representation –cont’d

Details of Polynomial representation:

2 3 4

2 3 4 2

2 3 4 1

2 2 4 2

2 2 3 4 1

U

U

m g

m g

m g

m g

X X X X X

X X X X X X

X X X X X X

X X X X X

X X X X X X X X

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State diagram

 A convolutional encoder belongs to a class of devices known as finite-state machines  A finite-state machine only encounters a finite number of states.  State of a machine: the smallest amount of information that, together with a current input to the machine, can predict the output of the machine.  In a Convolutional encoder, the state is represented by the contents of the memory.  Hence, there are 2(K-1)^ states.

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Trellis Diagram

 Trellis diagram is an extension of the state

diagram that shows the passage of time.

 Example of a section of trellis for the rate ½ code

t (^) i ti  1 Time

State S 0  00

S 1  01

S 2  10

S 3  11

0/

1/

0/

0/ 0/

1/

1/

1/