






Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
The instructions and solutions for the dc and ac steady state analysis of a given rlc circuit. It includes the use of kirchhoff's voltage and current laws, phasor analysis, and superposition. The document also covers the determination of the circuit's transfer function and bode plot.
Typology: Exams
1 / 11
This page cannot be seen from the preview
Don't miss anything!







Total Time Allotted : 50 min Total Points: 50
Last (Family) Name:
First Name:
Student ID: Lab Section:
Signature:
In the circuit shown above the current source is a DC source. The switch is open prior to time 0, and the current has reached steady state prior to time 0. At time 0 the switch closes. The reference configuration to use for each circuit element in solving the problem is shown in the figure. Please provide all answers in terms of Is, R, L, and C.
(a) What is iL(0−)? (2 pts)
(because cap is open circuit in DC steady state)
(b) What is vC (0−)? (2 pts)
(because inductor is short circuit in DC steady state)
(c) What is iL(0+)? (1 pt)
(d) What is vC (0+)? (1 pt)
For your convenience the circuit after the switch closes at time t = 0 is redrawn below. Use the same reference configurations as in the original figure. The rest of the problem refers to the situation after time 0.
(h) Writing an appropriate KVL equation, express i 1 (t) in terms of vC (t) (and the parameters Is, R, L, and C if needed) for t ≥ (^0) +. (2 pts)
Ri 1 (t) + vC (t) = Ri 2 (t) Ri 1 (t) + vC (t) = R(Is − i 1 (t)) 2 Ri 1 (t) = −vC (t) + RIs
(i) Using KCL at node A, express iL(t) in terms of vC (t) and the parameters for t ≥ (^0) +. (2 pts)
iL(t) + iC (t) = i 1 (t)
iL(t) = −
dvC dt
(t) + i 1 (t)
(j) Write down a differential equation that vC (t) must satisfy for t ≥ 0. (4 pts)
vc(t) = vL(t) = L diL(t) dt
d dt
dvC dt
(t) − vC (t) 2 R
Is 2
vc(t) = −LC d^2 vC dt^2
(t) −
dvC dt
(t) +
dIs dt (note that the undriven circuit has two resistors in series, so is a parallel RLC circuit with an effective resistance of 2R, and this is reflected in the homogenous equation for vC (t) )
d^2 vC dt^2
(t) +
dvC dt
(t) + vC (t) LC
dIs dt
(k) For what combination of parameter values is the circuit critically damped for t ≥ (^0) +? (Note: if your answer depends on Is, you have done something wrong). (2 pts) α = ω 0 1 4 RC
(a) What is the average power dissipated in the resistance? (4 pts) There are several ways to do this. The easiest is to work directly with the resistor. Using voltage divider, we obtain the voltage across the resistor as:
jωL + R
Note that VS = 10V , jωL = 1Ω, and R = 1Ω, so that plugging these values in, we have
j + 1
Hence, VR(t) = √^102 cos(1000t − 45 ◦).
To find the average power dissipated, we note that across a resistor, Pave = |VR^ |
2 2 R = (10/2)
It was a bit more algebraically messy to do this problem by instead finding the average power supplied across the current source (and using the fact that inductors do not dissipate average power to equate this to the power dissipated by the resistor). One could do this as follows: Observe that we would like to find Pave = Re{IsVs}/2. Recall that Is = Vs/Zeq , so we need to find 1/Zeq. Using the formula for parallel elements, we see that (^) Z^1 eq = (^) (jωL^1 ) + (^) (R+^1 jωL) = −j + (^) 1+^1 j = −j + (1 − j)/2 = (1 − j3)/2. Hence Pave = Re IsVs/2 = Re I
(^2) s 2 Zeq =^ Re(^
100 2
1+3j 2 ) =^
100 4 = 25. This agrees with our answer using the other method. (you could also find Is in polar notation, and then draw a triangle to find cos(θ), where θ is the angle between current and voltage, and then use Pave = VrmsIrms cos(θ)).
(b) We now want to put a capacitor in parallel with the load across the terminals a and b, resulting in the circuit below.
What should be the value of C such that no reactive power is drawn from the source? (4 pts)
We write 1 Ztot
1 /jωC
Za where Za is the impedance of the inductor and resistor combination found in part (a). Using the value from part (a), (^) Z^1 tot = jωC + 1 − 23 j. We want Ztot to be entirely real, which is equivalent to requiring its inverse to be real. Therefore we can set the imaginary component to 0, getting
jωC − 3 j/2 = 0,
or C = 3/ 2 ω = 1. 5 mF.
R
vs(t) C
Figure 1: Circuit
−4T −3T −2T −T 0 T 2T 3T 4T 5T
0
V_
t
v(t)s
Figure 2: Voltage source
In the circuit above (Fig. 1) the voltage source is periodic with period 2T and alternates between a value of V 0 for T seconds, followed by a value of 0 for T seconds as shown (Fig. 2). Sketch the steady state response vC (t), labeling the graph completely, i.e. vC (t) should be determined exactly. You need not explain the details by which you arrived at vC (t). However, you should explain why your sketched vC (t) is correct. (Hint: Try to think about the values that the steady state vC (t) should have when t lies in an interval that is an even multiple of T and the value it should have when t lies in an interval that is an odd multiple of T. Write two equations, relating these two values, using your understanding of RC circuits.) Without writing anything down, we can observe that when the source is on, the voltage across the capacitor should increase exponentially (i.e. quickly at first, then more slowly) towards the source voltage. When the source voltage is turned to 0, then the capacitor should discharge exponentially towards 0 (more quickly at first, then more slowly). This gives rise to a saw tooth pattern (2 pts for getting this far). Note that VC (t) should be continuous unless you anticipate infinite current! Further, note that it will not quite achieve the asymptotic values of 0 and V 0 , because it is given finite time (and you are given no information indicating that the time constant is smaller than your period T ) (2 more points for getting this far). For full points, we can quantify things: Recall the formula v(t) = Vfinal + (Vinitial − Vfinal)e−t/τ^. Applying it to our situation, we find that On odd intervals [T n, T (n + 1)], we have
Vc(t) = V 0 + (Vc(0) − V 0 )e−(t−T n)/RC
On even intervals [T (n + 1), T (n + 2)], we have
Vc(t) = 0 + Vc(T )e−[t−T^ (n+1)]/RC^.
To find the precise values vc(0) and vc(T ), we enforce continuity at the boundary points:
Vodd(end) = V 0 + (Vc(0) − V 0 )e−T /RC^ = Vc(T )e^0 = Veven(start)
and Vodd(start) = Vc(0) = Vc(T )e−T /RC^ = Veven(end)
We find
V 0 − V 0 e−T /RC^ = Vc(T )e^0 − Vc(0)e−T /RC^ = Vc(T )e^0 − Vc(T )e−^2 T /RC^ = Vc(T )(1 − e−^2 T /RC^ )
Therefore Vc(T ) = V 0 (1 − e−T /RC^ )/(1 − e−^2 T /RC^ ), and Vc(0) = V 0 (e−T /RC^ − e−^2 T /RC^ )/(1 − e−^2 T /RC^ ).
(note that we had better get that the amount it rises in an odd interval plus the amount it falls in an even interval sum to 0, so (Vc(0) − V 0 ) + Vc(T ) = 0. Indeed, we can check that this holds.) The thick green lines on the sketch indicate the actual capacitor voltage, while the thin ones show how it would continue if the source did not change value.
0 T 2T 3T 4T
0
V_
V_C(0)
V_C(T)
t
VC
(t)
Figure 3: Capacitor Voltage
Rubric: 2 pts for realizing it has an exponential (with the right concavities) sawtooth pattern. 2 more for realizing it does not quite reach the extreme points 0 and V 0. 2 final points for the precise values it reaches at the ends of each interval.